Version 2 of my Crazy Small CPU
☆77Dec 2, 2018Updated 7 years ago
Alternatives and similar repositories for CSCv2
Users that are interested in CSCv2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A crazy small 8-bit CPU built with only seventeen 7400-series chips.☆113May 7, 2020Updated 6 years ago
- The Software Supporting my implementations of the SAP-1 Computer Architecture as inspired by Ben Eater in both logisim and TTL hardware l…☆21Mar 18, 2021Updated 5 years ago
- ☆28Oct 14, 2024Updated last year
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 8 years ago
- A simulation of Ben Eater's 8-bit CPU in Logisim Evolution (Holy Cross Edition).☆33Aug 20, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board☆23Nov 17, 2021Updated 4 years ago
- Composite/component video output for homebrew 6502 computers☆34Oct 4, 2022Updated 3 years ago
- MOVED to code.netzhansa.com/hanshuebner/cadr2. This GitHub mirror is archived.☆17May 23, 2014Updated 12 years ago
- UART to AXI Stream interface written in VHDL☆19Oct 20, 2022Updated 3 years ago
- Building a computer from scratch using 74xx logic chips☆23May 4, 2020Updated 6 years ago
- Test of ICEstick PLL usage with Yosys/Arachne-PNR/Icetools☆21Oct 8, 2016Updated 9 years ago
- Nibbler is a 4 bit CPU built from standard 7400 series logic chips. Despite using only 17 chips, it can do some interesting tricks. It wa…☆13Jul 1, 2016Updated 10 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14May 1, 2020Updated 6 years ago
- Minimal ZX Spectrum for Ulx3s ECP5 board☆12May 7, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A programming language based on bindings.☆12Jul 6, 2025Updated 11 months ago
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆59Feb 3, 2023Updated 3 years ago
- Assembler for the Digital example processor☆64Oct 27, 2023Updated 2 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆37Jul 2, 2023Updated 2 years ago
- A user-mode simulator for various version of PDP-11 Unix☆38Jun 6, 2026Updated 3 weeks ago
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆34Aug 27, 2024Updated last year
- A tool for working with Forth code blocks☆12Jun 3, 2026Updated 3 weeks ago
- A raytracer written in Forth☆11Oct 28, 2017Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Space Invaders in Verilog for the iCE40 H1K☆17Feb 15, 2024Updated 2 years ago
- ☆11Jan 20, 2017Updated 9 years ago
- ☆68Oct 7, 2021Updated 4 years ago
- Datapoint 2200 Schematics and Documents☆19Jun 6, 2025Updated last year
- ☆25Jan 22, 2025Updated last year
- PDP-1 for MiSTer☆21Jan 1, 2019Updated 7 years ago
- RISC-V RV32E core designed for minimal area☆27Nov 17, 2024Updated last year
- RISC-V Playground on Nandland Go☆16Mar 2, 2023Updated 3 years ago
- Simple Jupiter Ace implementation for the Ice40 (myStorm BlackIce)☆12Jan 28, 2018Updated 8 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Intel 8080 Emulator in 6502 assembly (prototyped in C)☆11Aug 26, 2024Updated last year
- Simple Oscilloscope Simulator☆26May 31, 2022Updated 4 years ago
- Synthesizable i8080-compatible CPU core.☆28Aug 7, 2019Updated 6 years ago
- An implementation of Tic Tac Toe in TTL logic☆21Jun 28, 2019Updated 7 years ago
- This is the official repository for the STEMFIE App. STEMFIE is a construction set toy made with FreeCAD, similar to LEGO Technic.☆13Jan 30, 2025Updated last year
- Simple OS for raspberry pi 2 model B☆12Jun 24, 2017Updated 9 years ago
- Design and simulate a simplified ARM single-cycle processor using SystemVerilog.☆10Sep 13, 2019Updated 6 years ago