calint / tang-nano-9k--riscv--cache-psram
RISC-V implementation of rv32i for FPGA board Tang Nano 9K utilizing on-board burst PSRAM and flash
☆10Updated this week
Related projects ⓘ
Alternatives and complementary repositories for tang-nano-9k--riscv--cache-psram
- RiscV based SOC with 2D and 3D graphics acceleration for Tang Nano 20K☆28Updated 7 months ago
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆104Updated 3 months ago
- An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA☆59Updated 2 years ago
- TangNano-20K-example☆96Updated last year
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆48Updated last week
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆69Updated 7 months ago
- Update IceStudio to support ColorLight 5A-75X, i5 and ICeSugar Pro FPGA boards☆46Updated last year
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆92Updated last year
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆40Updated last year
- ☆31Updated 9 months ago
- Commodore C64 core for the Tang Nano 20K Primer 25K Mega 60k and Mega 138K Pro FPGA☆70Updated this week
- NESTang SDRAM controller and usage example for Tang Nano 20K☆34Updated last month
- Basic USB 1.1 Host Controller for small FPGAs☆85Updated 4 years ago
- ☆75Updated last year
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆82Updated 6 years ago
- Wishbone interconnect utilities☆37Updated 5 months ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Reusable Verilog 2005 components for FPGA designs☆36Updated last year
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆36Updated 6 months ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆45Updated this week
- A pipelined RISC-V processor☆47Updated 11 months ago
- Doom classic port to lightweight RISC‑V☆81Updated 2 years ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆73Updated 2 months ago
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆94Updated last year
- Basic Pong you can extend with rotary, sound, vga generator and autopilot☆12Updated 3 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆48Updated last year
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆79Updated 4 years ago
- Tutorials centred around Gowin FPGA parts for the /r/GowinFPGA subreddit☆50Updated 8 months ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆25Updated 3 years ago
- Demo projects for various Kintex FPGA boards☆47Updated 5 months ago