calint / tang-nano-9k--riscv--cache-psram
RISC-V implementation of rv32i for FPGA board Tang Nano 9K utilizing on-board burst PSRAM and flash
☆10Updated this week
Related projects ⓘ
Alternatives and complementary repositories for tang-nano-9k--riscv--cache-psram
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆92Updated last year
- An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA☆59Updated 2 years ago
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆104Updated 3 months ago
- RiscV based SOC with 2D and 3D graphics acceleration for Tang Nano 20K☆28Updated 7 months ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆69Updated 7 months ago
- NESTang SDRAM controller and usage example for Tang Nano 20K☆33Updated 3 weeks ago
- TangNano-20K-example☆95Updated 11 months ago
- Demo projects for various Kintex FPGA boards☆46Updated 5 months ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆78Updated 4 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆48Updated last year
- Documentation and tools related to DECA FPGA board☆21Updated 10 months ago
- Update IceStudio to support ColorLight 5A-75X, i5 and ICeSugar Pro FPGA boards☆46Updated last year
- ☆75Updated last year
- Examples for the Lushay Labs tang nano 9k series☆85Updated 5 months ago
- A simple 8 bit UART implementation in Verilog, with tests and timing diagrams☆19Updated last year
- Miscellaneous ULX3S examples (advanced)☆74Updated last year
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Wishbone interconnect utilities☆36Updated 5 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆36Updated 6 months ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆44Updated last week
- Experimental flows using nextpnr for Xilinx devices☆39Updated this week
- ☆31Updated 9 months ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆40Updated 11 months ago
- Basic USB 1.1 Host Controller for small FPGAs☆85Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆82Updated 6 years ago
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆62Updated this week
- ☆97Updated last year
- Reusable Verilog 2005 components for FPGA designs☆36Updated last year
- Tutorials centred around Gowin FPGA parts for the /r/GowinFPGA subreddit☆49Updated 8 months ago
- Basic Pong you can extend with rotary, sound, vga generator and autopilot☆12Updated 3 years ago