NTU-ALComLab / LSV-PA
Logic Synthesis and Verification: Programming Assignments
☆12Updated 4 months ago
Alternatives and similar repositories for LSV-PA:
Users that are interested in LSV-PA are comparing it to the libraries listed below
- An open-source quantum automatic test generator.☆14Updated 7 months ago
- 張耀文老師的"奈米積體電路實體設計"作業(Physical Design)☆8Updated last year
- ☆25Updated 4 years ago
- C++ header-only reasoning library☆14Updated 9 months ago
- A circuit toolkit☆100Updated 5 years ago
- C++ logic network library☆228Updated 6 months ago
- Routing Visualization for Physical Design☆19Updated 6 years ago
- Showcase examples for EPFL logic synthesis libraries☆194Updated last year
- C++ truth table library☆53Updated last year
- A Python library for working with logic networks, synthesis, and optimization.☆12Updated this week
- C++ header-only exact synthesis library☆17Updated 2 years ago
- EPFL logic synthesis benchmarks☆186Updated 8 months ago
- Open Source Detailed Placement engine☆38Updated 5 years ago
- A logic synthesis tool☆73Updated 2 weeks ago
- A BDD-based Quantum Circuit Simulator☆19Updated 2 months ago
- C++ implementation for Sequence Pair fixed-outline chip floorplanner☆11Updated 2 years ago
- Semi-Tenser Product based SAT and AllSAT solver, where it can solve CNF and circuit input.☆15Updated last year
- ☆29Updated 4 years ago
- VLSI EDA Global Router☆72Updated 7 years ago
- An open-source design automation framework for Field-coupled Nanotechnologies☆69Updated this week
- 2019 NTHU CS6135 (CS613500) VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing …☆34Updated 3 weeks ago
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆19Updated 4 months ago
- Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization☆119Updated 4 months ago
- State-of-the-art in reversible logic synthesis☆18Updated 8 years ago
- Power grid analysis☆19Updated 4 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆131Updated 2 years ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)☆39Updated 6 years ago
- An advanced header-only exact synthesis library☆25Updated 2 years ago
- An Extensible Framework for Hardware Verification and Debugging☆18Updated 2 years ago
- Optimization results for superconducting electronic (SCE) circuits☆13Updated last year