AI-Assisted Verification of Data Structures
☆21May 27, 2026Updated 2 months ago
Alternatives and similar repositories for VeriStruct
Users that are interested in VeriStruct are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- AlphaVerus: Formally Verified Code Generation through Self-Improving Translation and Treefinement☆33May 14, 2025Updated last year
- APS: An open-source toolchain towards agile processor specialization based on MLIR☆19Jan 17, 2026Updated 6 months ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated 2 years ago
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- Yosys RTLIL dialect for MLIR☆24Jun 12, 2025Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A Lean-embedded framework to verify Verilog modules☆15Updated this week
- Contract-Aware RTL Code Generation Agents with Temporal Tracing, Slicing and Formal Verification☆23Jan 28, 2026Updated 6 months ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- ☆28Aug 3, 2026Updated last week
- Auto formalization of the CLRS text book☆38Jul 8, 2026Updated last month
- A tool for cross-checking Verilog compilers☆15Apr 16, 2025Updated last year
- TAIDL: Tensor Accelerator ISA Definition Language☆19Apr 28, 2026Updated 3 months ago
- Cell layout generation (MH Multiheight) for DTCO/STCO exploration toolkit.☆15Oct 6, 2025Updated 10 months ago
- ☆113Jun 2, 2026Updated 2 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆16Jul 3, 2023Updated 3 years ago
- Ranking LLM-Generated Loop Invariants for Program Verification.☆13Aug 20, 2024Updated last year
- Integer Multiplier Generator for Verilog☆25Jul 4, 2025Updated last year
- [NeurIPS 2024 Spotlight] Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs☆16Feb 22, 2026Updated 5 months ago
- Refreshing automation for inductive equational proofs using e-graphs☆28Jul 7, 2024Updated 2 years ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated last year
- ☆16Jan 23, 2026Updated 6 months ago
- SymDiff-Differential-Program-Verifier☆40Aug 21, 2025Updated 11 months ago
- Connecting bv_decide to SMTLIB.☆16Aug 3, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆19Nov 21, 2019Updated 6 years ago
- FPGA synthesis tool powered by equality saturation and program synthesis.☆14Jan 9, 2026Updated 7 months ago
- E-Graphs, natively in MLIR☆35Updated this week
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆30Jan 7, 2026Updated 7 months ago
- VeriBetrKV OSDI'20 artifact☆13Sep 5, 2020Updated 5 years ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆23Oct 31, 2024Updated last year
- A Survey on LLM-based Code Generation for Low-Resource and Domain-Specific Programming Languages☆20Jun 11, 2026Updated last month
- ☆19Dec 21, 2020Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆49May 18, 2024Updated 2 years ago
- ☆14Jan 3, 2018Updated 8 years ago
- ☆15Jan 14, 2025Updated last year
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆29Apr 9, 2025Updated last year
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆32May 24, 2025Updated last year
- A standalone structural (gate-level) verilog parser☆42Jul 29, 2026Updated last week
- ☆20Jan 2, 2026Updated 7 months ago