Alternatives and similar repositories for SW-HW-Co-design-of-Dilithium

Users that are interested in SW-HW-Co-design-of-Dilithium are comparing it to the libraries listed below

• GMUCERG / Dilithium
  High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.
  ☆56Updated 2 years ago
• xingyf14 / CRYSTALS-Kyber
  ☆56Updated 4 years ago
• acmert / parametric-ntt
  Parametric NTT/INTT Hardware Generator
  ☆72Updated 4 years ago
• acmert / kyber-polmul-hw
  Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
  ☆36Updated 3 years ago
• kemalderya / pqc-param-ntt
  ☆24Updated 3 years ago
• xiang-rc / cfntt_ref
  ☆35Updated 10 months ago
• LoganBrist / C-Verilog_NTT_RNS_Polymultiplier
  ☆26Updated 4 years ago
• FatemehAhsan / CRYSTALS-Dilithium_Key-Generation_Verilog
  Dilithium is a digital signature scheme that is strongly secure under chosen message attacks based on the hardness of lattice problems ov…
  ☆14Updated last year
• pq-crypto / vpqc
  processor for post-quantum cryptography
  ☆16Updated 5 years ago
• flokrieger / Aloha-HE
  ☆24Updated 3 weeks ago
• florianhirner / proteus
  ☆15Updated last year
• acmert / ntt-based-polmul
  Python implementations of various NTT/INTT and NTT-based polynomial multiplication algorithms
  ☆38Updated 4 years ago
• XBQ314 / A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units
  Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元
  ☆19Updated 2 years ago
• sujoyetc / SABER_HW
  Hardware implementation of Saber
  ☆9Updated 4 years ago
• secworks / aes
  Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementatio…
  ☆369Updated 2 months ago
• KULeuven-COSIC / COSO-TRNG
  Reference implementation for the COherent Sampling ring Oscillator based True Random Number Generator.
  ☆13Updated 7 months ago
• AdityaMohanty374 / NTT_Implementation
  Employed into Crystal-Kyber Algorithm, a prominent Lattice-based Post Quantum Cryptography(PQC) algorithm, for polynomial multiplication …
  ☆13Updated 3 months ago
• ntt-polymul / ntt-polymul
  Saber and NTRU on M4 and AVX2
  ☆17Updated 3 years ago
• scluconn / LPN-based_PUF
  FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.
  ☆15Updated 7 years ago
• pnvamshi / Hardware-Implementation-of-AES-Verilog
  Hardware Implementation of Advanced Encryption Standard Algorithm in Verilog
  ☆39Updated 8 years ago
• hgrosz / aes-dom
  DOM Protected Hardware Implementation of AES
  ☆20Updated 9 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆34Updated 10 years ago
• mematrix / AES-FPGA
  AES加密解密算法的Verilog实现
  ☆67Updated 9 years ago
• gongxunwu / sm4-verilog
  ☆23Updated 6 years ago
• dilithium-cortexm / dilithium-cortexm
  ☆19Updated 4 years ago
• deep-inder / tvla
  Using Test Vector Leakage Assessment methodology to analyze side-channel attacks on hardware implementations of AES-128
  ☆11Updated 3 years ago
• uclcrypto / pqm4_masked
  Masked implementations of PQ schemes for the Cortex-M4.
  ☆9Updated 5 months ago
• DHLSan / FastHomNAND
  Acceleration of TFHE-based Homomorphic NAND Gate on FPGA
  ☆17Updated 3 years ago
• KULeuven-COSIC / NTRU_NTT_HW
  ☆23Updated 3 years ago
• ascon / ascon-hardware
  NIST LWC Hardware Reference Implementation of Ascon v1.2
  ☆26Updated last year