开源国密SM2/SM3/SM4算法，基于GmSSL，基于OpenSSL1.1.0
☆11Apr 22, 2017Updated 9 years ago
Alternatives and similar repositories for opensm
Users that are interested in opensm are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [Qt工具] 字符串加密工具，有 AES、Base64+XOR 两种。☆11Jul 15, 2019Updated 7 years ago
- ☆12Oct 17, 2022Updated 3 years ago
- Load balancing based on reinforcement learning.☆11Oct 11, 2020Updated 5 years ago
- RoutingFlow is a project inspired by RouteFlow, aims to implement legacy and distributed routing protocol in a OpenFlow network.☆14Aug 25, 2014Updated 11 years ago
- The Incremental Deployment Method of Segment Routing over an IPv6 (SRv6) Network Based on Graph Neural Network (GNN) and Multi-Agent Rein…☆16Jan 24, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Implement the dynamic routing in SDN (Ryu)☆11Jun 8, 2015Updated 11 years ago
- Project codes of ns3 and DRL☆15Oct 8, 2020Updated 5 years ago
- SDN based Traffic Engineering and Segment Routing☆15Jun 17, 2015Updated 11 years ago
- 10_100_1000 Mbps tri-mode ethernet MAC☆11Jul 17, 2014Updated 12 years ago
- Multi agent DQN-based strategy for an Segment Routing network, able to react to link overload.☆15Nov 9, 2023Updated 2 years ago
- ☆16Aug 30, 2022Updated 3 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- This source code can be used to optimize SDN controller placement☆16Aug 4, 2020Updated 5 years ago
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆14Jul 5, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago
- SPAA'21: Efficient Stepping Algorithms and Implementations for Parallel Shortest Paths☆21Aug 10, 2024Updated last year
- A Fractional Divider with Delta-Sigma Modulator and Dual-Mode Divider for Phase-Locked Loop☆16Apr 25, 2021Updated 5 years ago
- a multiplier÷r verilog RTL file for RV32M instructions☆14Mar 17, 2020Updated 6 years ago
- RTL Design and Implementation of High Performance Algorithm Logic Units☆15Oct 1, 2019Updated 6 years ago
- ☆12Aug 26, 2016Updated 9 years ago
- ASIC Design of the openSPARC Floating Point Unit☆17Mar 13, 2017Updated 9 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 位宽和深度可定制的异步FIFO☆14May 29, 2024Updated 2 years ago
- ☆21May 17, 2020Updated 6 years ago
- AXI-4 RAM Tester Component☆21Aug 5, 2020Updated 5 years ago
- a-deep-rl-approach-for-sdn-routing-optimization: with actor-critic algorithms☆22Dec 3, 2018Updated 7 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated last year
- Link-state routing protocol using Dijkstra's algorithm for a Software-Defined Network in Mininet.☆31Sep 8, 2020Updated 5 years ago
- How to use the Intel JTAG primitive without using virtual JTAG☆17Oct 31, 2021Updated 4 years ago
- IOb_SoC version of the Picorv32 RISC-V Verilog IP core☆14Dec 22, 2025Updated 7 months ago
- Wraps the NVDLA project for Chipyard integration☆24Sep 2, 2025Updated 10 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- This project is an implementation of Dijkstra Algorithm utilizing Ryu Controller and mininet for routing packets in network topologies.☆26Aug 29, 2021Updated 4 years ago
- unsigned Radix-2 SRT division,基2除法☆17May 12, 2015Updated 11 years ago
- The .NET data provider for GaussDB.☆10Jun 22, 2026Updated last month
- Reinforcement Learning (RL)-based routing algorithm for SDN networks created from scratch using Python.☆29Mar 15, 2022Updated 4 years ago
- ☆16Mar 18, 2024Updated 2 years ago
- 开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车，分为两个部分，控制器部分和小车部分，通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势，从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…☆14Mar 10, 2019Updated 7 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆14Nov 28, 2019Updated 6 years ago