osresearch / risc8Links
Mostly AVR compatible FPGA soft-core
☆28Updated 3 years ago
Alternatives and similar repositories for risc8
Users that are interested in risc8 are comparing it to the libraries listed below
Sorting:
- A repository for a random collection of stuff pertaining to reverse engineering the Pano Logic G2 "zero" client☆34Updated 6 years ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆29Updated 6 years ago
- Network based loader and flasher for Pano G2 devices☆15Updated last year
- Bit streams forthe Ulx3s ECP5 device☆17Updated 2 years ago
- EDA Tools: Xilinx ISE 14.7 Dockerfile☆21Updated 3 years ago
- Flashing Pano Logic thin clients without a programmer☆41Updated 3 years ago
- 16 bit RISC-V proof of concept☆24Updated 9 months ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆32Updated 8 years ago
- Mega/Xmega soft core RTL design.☆11Updated 5 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14Updated 5 years ago
- FPGA ULX2/3 JTAG programmer☆40Updated 2 years ago
- ☆24Updated 4 years ago
- DVI PMOD adapter (HDMI connector)☆28Updated 4 years ago
- Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs☆31Updated 3 years ago
- VGA-compatible text mode functionality☆17Updated 5 years ago
- PCB combining Raspberry Pi Pico and iCE40 FPGA☆32Updated last year
- Mini CPU design with JTAG UART support☆20Updated 4 years ago
- Tiny tips for Colorlight i5 FPGA board☆57Updated 4 years ago
- Beginner-friendly Verilog based examples for the ULX3S FPGA board.☆11Updated 3 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆60Updated 6 years ago
- Update IceStudio to support ColorLight 5A-75X, i5 and ICeSugar Pro FPGA boards☆48Updated last year
- A highly-configurable and compact variant of the ZPU processor core☆34Updated 9 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆15Updated last year
- ☆12Updated last week
- USB Full-Speed core written in migen/LiteX☆42Updated 6 years ago
- My pergola FPGA projects☆30Updated 4 years ago
- Use ECP5 JTAG port to interact with user design☆29Updated 3 years ago
- ☆20Updated last year
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Updated 9 years ago