laura-regan / Digital-SynthesizerLinks
Digital music synthesizer designed for the Zynq FPGA+SoC. Audio synthesis and digital signal processing is performed in hardware modules designed in VHDL. Control of the modules and communication with external MIDI equipment is handled by the ARM processor.
☆22Updated last year
Alternatives and similar repositories for Digital-Synthesizer
Users that are interested in Digital-Synthesizer are comparing it to the libraries listed below
Sorting:
- VHDL I2S transmitter☆13Updated 6 years ago
- A collection of demonstration digital filters☆154Updated last year
- FPGA-based Multi-Effects system for the electric guitar☆135Updated 7 years ago
- verilog example to drive PCM5102 DAC with FPGA☆18Updated 7 years ago
- audio DSP applications using zynq/zed boards☆17Updated 4 years ago
- i2s core, with support for both transmit and receive☆31Updated 7 years ago
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆115Updated 4 years ago
- Audio controller (I2S, SPDIF, DAC)☆85Updated 5 years ago
- sliding DFT for FPGA, targetting Lattice ICE40 1k☆77Updated 5 years ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆11Updated this week
- Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions.…☆30Updated 7 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆69Updated 3 years ago
- ☆24Updated 5 years ago
- FPGA based USB 2.0 high speed audio interface featuring multiple optical ADAT inputs and outputs☆163Updated 10 months ago
- ☆65Updated 5 years ago
- A configurable C++ generator of pipelined Verilog FFT cores☆242Updated last year
- Academic project for the course of Digital Systems Design. The aim of the project was to design and implement an IIR audio filter on FPGA☆12Updated 7 years ago
- Synthesizable SystemVerilog IP-Core of the I2S Receiver☆10Updated 5 years ago
- Realtime audio DSP on the ZyBo☆9Updated 9 years ago
- A tiny example of PCM to PDM pipeline on FPGA☆21Updated 3 years ago
- a USB2 highspeed device core, written in amaranth HDL☆49Updated 10 months ago
- A eurorack-friendly audio frontend compatible with many FPGA boards, based on the AK4619VN audio CODEC.☆211Updated 3 weeks ago
- A comparison of 1st and 2nd order sigma delta DAC for FPGA☆58Updated 4 years ago
- Hardware description (VHDL) and configuration scripts (Python) of a versatile IIR Filter implemented as cascaded SOS/biquads. No vendor-s…☆21Updated 7 years ago
- Verilog FPGA code : including experimental DSP audio processor☆11Updated 4 years ago
- VHDL Library for implementing common DSP functionality.☆29Updated 6 years ago
- Audio Signal Processing SoC☆18Updated 7 years ago
- Skeletal repository for GNU Radio WBFM implementation on Pynq board☆13Updated 8 years ago
- ☆29Updated 4 years ago
- ☆23Updated 3 years ago