jaebaek / tenstorrent-tiny-examplesLinks
Simple experiments on Tenstorrent GraySkull e75 chip
☆13Updated last year
Alternatives and similar repositories for tenstorrent-tiny-examples
Users that are interested in tenstorrent-tiny-examples are comparing it to the libraries listed below
Sorting:
- Utilities for accessing AMD's Machine-Readable GPU ISA Specifications.☆42Updated 2 months ago
- Tenstorrent MLIR compiler☆213Updated last week
- 🚧 A work-in-progress GLSL compiler targeting SPIR-V mlir 🚧☆22Updated last year
- User-Mode Driver for Tenstorrent hardware☆35Updated this week
- The TT-Forge FE is a graph compiler designed to optimize and transform computational graphs for deep learning models, enhancing their per…☆51Updated this week
- ☆79Updated last week
- Tenstorrent Kernel Module☆57Updated this week
- The translator that supports translating NVPTX to SPIR-V. This translator is modified from LLVM-SPIR-V Translator.☆44Updated 4 years ago
- A tool for generating information about the matrix multiplication instructions in AMD Radeon™ and AMD Instinct™ accelerators☆121Updated 2 weeks ago
- A framework that support executing unmodified CUDA source code on non-NVIDIA devices.☆137Updated 10 months ago
- ☆94Updated 2 weeks ago
- GPUOcelot: A dynamic compilation framework for PTX☆216Updated 9 months ago
- ☆28Updated 4 years ago
- chipStar is a tool for compiling and running HIP/CUDA on SPIR-V via OpenCL or Level Zero APIs.☆305Updated this week
- A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code☆136Updated last week
- ☆27Updated 8 months ago
- Simple demonstration of using the RISC-V Vector extension☆49Updated last year
- Experimental OpenCL SPIR-V to OpenCL C translator☆27Updated 3 weeks ago
- A simple profiler to count Nvidia PTX assembly instructions of OpenCL/SYCL/CUDA kernels for roofline model analysis.☆56Updated 8 months ago
- Trying to figure various CPU things out☆88Updated last year
- Super fast FP32 matrix multiplication on RDNA3☆79Updated 7 months ago
- Fork of LLVM to support AMD AIEngine processors☆174Updated this week
- SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM☆121Updated last year
- Attention in SRAM on Tenstorrent Grayskull☆39Updated last year
- MLIR metal dialect☆33Updated last year
- This is the AMD-maintained fork of the LLVM git repository. This repository accepts pull requests and issues related to AMD fork-specific…☆193Updated this week
- Intel® Extension for MLIR. A staging ground for MLIR dialects and tools for Intel devices using the MLIR toolchain.☆145Updated last week
- ☆37Updated last year
- SYCL Reference Manual☆28Updated last year
- ☆157Updated this week