Alternatives and similar repositories for tensix-isa-simulator

Users that are interested in tensix-isa-simulator are comparing it to the libraries listed below

• tenstorrent / tt-kmd
  Tenstorrent Kernel Module
  ☆46Updated last week
• tenstorrent / tt-forge-fe
  The TT-Forge FE is a graph compiler designed to optimize and transform computational graphs for deep learning models, enhancing their per…
  ☆46Updated this week
• tenstorrent / tt-budabackend
  Buda Compiler Backend for Tenstorrent devices
  ☆29Updated 3 months ago
• tenstorrent / tt-mlir
  Tenstorrent MLIR compiler
  ☆151Updated last week
• tenstorrent / tt-forge
  Tenstorrent's MLIR Based Compiler. We aim to enable developers to run AI on all configurations of Tenstorrent hardware, through an open-s…
  ☆78Updated this week
• AMDResearch / Riallto
  The Riallto Open Source Project from AMD
  ☆81Updated 3 months ago
• tenstorrent / tt-smi
  Tenstorrent console based hardware information program
  ☆45Updated last week
• nod-ai / iree-amd-aie
  IREE plugin repository for the AMD AIE accelerator
  ☆98Updated this week
• uxlfoundation / oneapi-construction-kit
  ☆86Updated last week
• Xilinx / llvm-aie
  Fork of LLVM to support AMD AIEngine processors
  ☆152Updated this week
• cupbop / CuPBoP
  A framework that support executing unmodified CUDA source code on non-NVIDIA devices.
  ☆131Updated 6 months ago
• iree-org / iree-bare-metal-arm
  Example for running IREE in a bare-metal Arm environment.
  ☆36Updated 4 months ago
• iree-org / iree-turbine
  IREE's PyTorch Frontend, based on Torch Dynamo.
  ☆90Updated this week
• tenstorrent / tt-firmware
  Tenstorrent Firmware repository
  ☆15Updated last week
• 0xD0GF00D / DocumentSASS
  Unofficial description of the CUDA assembly (SASS) instruction sets.
  ☆105Updated 4 months ago
• ROCm / rocMLIR
  ☆148Updated this week
• gpuocelot / gpuocelot
  GPUOcelot: A dynamic compilation framework for PTX
  ☆201Updated 5 months ago
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆118Updated last week
• tenstorrent / riscv_arch_tests
  Self checking RISC-V directed tests
  ☆110Updated last month
• Xilinx / mlir-air
  ☆102Updated last week
• tenstorrent / whisper
  ☆47Updated last month
• Zhao-Dongyu / sgemm_riscv
  This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platfor…
  ☆21Updated 7 months ago
• riscv / riscv-bfloat16
  ☆35Updated last year
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆45Updated last year
• intel / mlir-extensions
  Intel® Extension for MLIR. A staging ground for MLIR dialects and tools for Intel devices using the MLIR toolchain.
  ☆137Updated last week
• CRobeck / instrument-amdgpu-kernels
  LLVM/MLIR based compiler instrumentation of AMD GPU kernels
  ☆18Updated 2 months ago
• kuterd / nv_isa_solver
  Nvidia Instruction Set Specification Generator
  ☆280Updated last year
• NodLabs / mlir-examples
  a simple end to end example of taking a ML graph (TF2 / PyTorch) and running it on a device [cpu, gpu]
  ☆35Updated 4 years ago
• arc-research-lab / Aries
  ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)
  ☆36Updated last week
• tenstorrent / tt-umd
  User-Mode Driver for Tenstorrent hardware
  ☆27Updated this week