Alternatives and similar repositories for pyPCIe

Users that are interested in pyPCIe are comparing it to the libraries listed below

• CESNET / ndk-fpga
  Network Development Kit (NDK) for FPGA cards with example application
  ☆68Updated last week
• texane / vpcie
  implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture
  ☆108Updated 7 years ago
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆70Updated 11 months ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆54Updated 2 years ago
• UofT-HPRC / fpga-bpf
  A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark
  ☆49Updated 4 years ago
• tymonx / virtio
  Virtio implementation in SystemVerilog
  ☆48Updated 7 years ago
• slaclab / axi-pcie-core
  ☆25Updated last week
• Kuree / kratos
  Debuggable hardware generator
  ☆70Updated 2 years ago
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆26Updated 5 years ago
• Xilinx / open-nic-dpdk
  DPDK Drivers for AMD OpenNIC
  ☆27Updated 2 years ago
• antmicro / verilator-old-archived
  ☆22Updated 2 years ago
• Nic30 / hwtLib
  hardware library for hwt (= ipcore repo)
  ☆43Updated 3 weeks ago
• RSPwFPGAs / qemu-hdl-cosim
  VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs
  ☆51Updated 4 years ago
• MikeCovrado / GettingVerilatorStartedWithUVM
  Simple UVM environment for experimenting with Verilator.
  ☆28Updated last month
• Xilinx / pcie-model
  PCI Express controller model
  ☆70Updated 3 years ago
• pulp-platform / morty
  A SystemVerilog source file pickler.
  ☆60Updated last year
• lewiz-support / LMAC_CORE2
  LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G
  ☆40Updated 2 years ago
• rivosinc / hammer
  Infrastructure to drive Spike (RISC-V ISA Simulator) in cosim mode. Hammer provides a C++ and Python interface to interact with Spike.
  ☆39Updated 3 months ago
• Xilinx / chipscopy
  ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…
  ☆62Updated 3 weeks ago
• fpgasystems / davos
  Distributed Accelerator OS
  ☆63Updated 3 years ago
• ChenJianyunp / FPGA-Snappy-Decompressor
  A new kind of hardware decompressor for Snappy decompression. Much faster than the existing software one.
  ☆24Updated 2 years ago
• verilator / example-systemverilog
  ☆40Updated last year
• wyvernSemi / pcievhost
  PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities
  ☆127Updated 2 weeks ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 5 years ago
• antmicro / fastvdma
  Antmicro's fast, vendor-neutral DMA IP in Chisel
  ☆127Updated 6 months ago
• maltevesper / JetStream-hardware
  ☆21Updated 9 years ago
• chipsalliance / omnixtend
  OmniXtend cache coherence protocol
  ☆82Updated 5 months ago
• xlsynth / bedrock-rtl
  High quality and composable RTL libraries in SystemVerilog
  ☆28Updated last week
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆70Updated 5 months ago
• beehive-lab / FastPath_MP
  FastPath_MP: An FPGA-based multi-path architecture for direct access from FPGA to NVMe SSD
  ☆36Updated 4 years ago