Contests
☆20Jul 28, 2026Updated last month
Alternatives and similar repositories for Agentic4SystemSummerSchoolContest
Users that are interested in Agentic4SystemSummerSchoolContest are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Open-source, agent-agnostic RTL formal verification skill library for AI coding agents: JasperGold FPV, SVA, proof optimization, and TCL …☆33Jul 27, 2026Updated last month
- EDA claws for analog/digital circuits and device design☆53Updated this week
- Vivado HLS study notes, courses, documents.☆13Dec 7, 2019Updated 6 years ago
- 基于FP16的二维脉动阵列电路设计☆13Feb 23, 2023Updated 3 years ago
- Tiny Tapeout breakout PCBs☆21Aug 27, 2026Updated 2 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆18Apr 2, 2026Updated 5 months ago
- 在FPGA端实现JPEG编码(开发中……☆13Oct 17, 2024Updated last year
- Source code repository for ASPLOS '25 paper "Syno: Structured Synthesis for Neural Operators"☆15Aug 31, 2025Updated last year
- A CORDIC implementation of square root Verilog calculation on Quartus Prime 16.0, with ability to simulate on ModelSim as well.☆19Jul 24, 2021Updated 5 years ago
- BitNet a4.8 Implementation in one file of pytorch☆26Jan 13, 2025Updated last year
- ☆36Nov 27, 2023Updated 2 years ago
- VeriFlow-CC: A Claude Code-driven RTL design pipeline. Automates Chip-on-Chat from architecture to synthesis (iVerilog/Yosys) using a sta…☆50Aug 3, 2026Updated last month
- RISC-V Sv39 Page Table Entry Visualization Tool☆17May 20, 2025Updated last year
- SDIO Device Verilog Core☆25Jul 25, 2018Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆21Jul 12, 2024Updated 2 years ago
- 全新使用JAVA编写的DLUTToolBox手机版,UI仿照i大工进行,保留i大工所有服务大厅功能并增加了一些i大工没有但实用的功能 举例:浏览器页面分享,截图分享,APP功能固定到桌面,课表数据动态刷新;增加教务系统便捷应用,增加开发区校区网络模块,可以实时监测并自动认证…☆28Sep 15, 2025Updated 11 months ago
- 集成电路 / 微电子专业自 学指南。17 个科研方向全景导览(课题组 · 知识路径 · 毕业去向),7大知识板块 200+ 门课程资源,帮助同学们构建连续的知识体系。希望对同学们的学习有所帮助❤️,如果喜欢请给个star🌟☆242Updated this week
- ☆60Apr 8, 2024Updated 2 years ago
- PKU 编译 lab 2023 - SysY 编译器☆14Oct 17, 2023Updated 2 years ago
- Learning-based lithography simulator and mask optimizer☆44Oct 24, 2021Updated 4 years ago
- 2024编译系统实现赛RISC-V赛道一等奖作品(A compiler of SysY (subset of C) )☆23Sep 4, 2024Updated 2 years ago
- AI-assisted FPGA development across AMD Vivado, Anlogic TangDynasty, and Intel Quartus.☆57Aug 17, 2026Updated 3 weeks ago
- “Build It. Test It. Publish It.” This year’s program emphasizes not only open-source design and tapeout, but also reproducible results, m…☆101Updated this week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板☆36Dec 4, 2025Updated 9 months ago
- 紫光同创FPGA大赛☆39Mar 19, 2025Updated last year
- LLM-powered Chrome extension for automatic web form filling. All data stays local.☆39Jun 4, 2026Updated 3 months ago
- A framework for secure, handy, accurate, and fast transformer inference☆29Aug 29, 2025Updated last year
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆74Aug 1, 2025Updated last year
- FFT implement by verilog_测试验证已通过☆62Sep 14, 2016Updated 9 years ago
- a collection of skills for vllm-omni☆86Updated this week
- FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool☆122Jul 2, 2025Updated last year
- Examples for creating AXI-interfaced peripherals in Chisel☆76Nov 15, 2015Updated 10 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆128Mar 18, 2026Updated 5 months ago
- An unofficial reference implementation of the C Minus Minus Compiler☆69Feb 3, 2025Updated last year
- An open-source EDA infrastructure and tools from netlist to GDS☆544Jul 9, 2026Updated 2 months ago
- Pipeline FFT Implementation in Verilog HDL☆175Apr 14, 2019Updated 7 years ago
- ☆246Jun 21, 2022Updated 4 years ago
- Awesome Artificial Intelligence for Electronic Design Automation Papers.☆214Dec 28, 2023Updated 2 years ago
- A seamless python to Cadence Virtuoso Skill interface☆343Mar 23, 2026Updated 5 months ago