antmicro / rdimm-ddr4-tester
Experimental platform built around Xilinx Kintex-7 FPGA for development and customization of RAM controllers supporting RDIMM DDR4 RAM modules used in data centers.
☆14Updated last year
Alternatives and similar repositories for rdimm-ddr4-tester:
Users that are interested in rdimm-ddr4-tester are comparing it to the libraries listed below
- Small footprint and configurable Inter-Chip communication cores☆57Updated 2 weeks ago
- Quite OK image compression Verilog implementation☆21Updated 5 months ago
- Experimental breakout board for a signle 200-ball WFBGA LPDDR4 chip in SO-DIMM DDR4 form factor.☆13Updated last year
- FPGA reference design for the the Swerv EH1 Core☆71Updated 5 years ago
- RISC-V Processor written in Amaranth HDL☆37Updated 3 years ago
- Using VexRiscv without installing Scala☆38Updated 3 years ago
- BRISKI ( Barrel RISC-V for Kilo-core Implementations ) is a fast and compact RISC-V barrel processor core that emphasize high throughput …☆19Updated last week
- PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers☆39Updated 2 weeks ago
- Naive Educational RISC V processor☆83Updated 6 months ago
- ☆18Updated 6 years ago
- RTL blocks compatible with the Rocket Chip Generator☆16Updated last month
- Verilog based simulation modell for 7 Series PLL☆13Updated 5 years ago
- FPGA board-level debugging and reverse-engineering tool☆36Updated 2 years ago
- Utilities for working with a Wishbone bus in an embedded device☆44Updated last year
- Open Source AES☆31Updated last year
- FLIX-V: FPGA, Linux and RISC-V☆41Updated last year
- LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G☆36Updated 2 years ago
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆31Updated 4 years ago
- A Verilog Synthesis Regression Test☆37Updated last year
- The open-source Zynq 7000 BSP generator for openXC7☆31Updated 3 months ago
- PCIe analyzer experiments☆52Updated 4 years ago
- ☆23Updated 2 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆38Updated last year
- Extensible FPGA control platform☆60Updated 2 years ago
- A place to share libraries and utilities that don't belong in the core bsc repo☆35Updated last month
- RISC-V Configuration Structure☆38Updated 6 months ago
- GDB server to debug CPU simulation waveform traces☆44Updated 3 years ago
- Generic Logic Interfacing Project☆46Updated 4 years ago
- ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.☆33Updated last week
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆72Updated 10 months ago