Alternatives and similar repositories for vscode:

Users that are interested in vscode are comparing it to the libraries listed below

• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆69Updated this week
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆55Updated this week
• sylefeb / Iron
  Iron: selectively turn RISC-V binaries into hardware
  ☆23Updated last year
• machdyne / lowe
  Löwe FPGA Board
  ☆12Updated last year
• suarezvictor / litex_imgui_usb_demo
  Soft USB for LiteX
  ☆50Updated last year
• sylefeb / Silixel
  Exploring gate level simulation
  ☆56Updated 2 years ago
• OpenPOWERFoundation / a2i
  The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers
  ☆40Updated 2 years ago
• darklife / udarkrisc
  u[Dark]RISC -- "micro-darkrisc" -- an early 16-bit micro-RISC processor defined before DarkRISCV
  ☆13Updated last year
• openXC7 / openXC7-snap
  snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support
  ☆28Updated 6 months ago
• machdyne / kuchen
  Kuchen Computer
  ☆23Updated 6 months ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆39Updated last year
• sylefeb / gfxcat
  A catalog of my old-school GFX effects
  ☆42Updated 11 months ago
• TinyTapeout / tt-multiplexer
  ☆14Updated last month
• blackmesalabs / sump3
  sump3 logic analyzer
  ☆17Updated last month
• amaranth-lang / rfcs
  RFCs for changes to the Amaranth language and standard components
  ☆17Updated 4 months ago
• fallen / SucreLA
  Open source Logic Analyzer based on LiteX SoC
  ☆24Updated 3 weeks ago
• JulianKemmerer / PipelineC-Graphics
  Graphics demos
  ☆98Updated 9 months ago
• ulixxe / usb_dfu
  Full Speed USB DFU interface for FPGA and ASIC designs
  ☆17Updated 10 months ago
• meiniKi / FazyRV
  A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
  ☆77Updated 4 months ago
• Mecrisp / Nandland-RISC-V
  RISC-V Playground on Nandland Go
  ☆15Updated last year
• j-core / jcore-cpu
  J-Core J2/J32 5 stage pipeline CPU core
  ☆50Updated 4 years ago
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆63Updated last year
• amaranth-lang / rtl-debugger
  VS Code based debugger for hardware designs in Amaranth or Verilog
  ☆35Updated last month
• stnolting / neorv32-riscof
  ✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆30Updated this week
• grayresearch / s3ga
  S3GA: a simple scalable serial FPGA
  ☆10Updated 2 years ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆15Updated 4 years ago
• tommythorn / tinytapeout-4-bit-cpu
  A design for TinyTapeout
  ☆15Updated 2 years ago
• fm4dd / gatemate-riscv
  RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga
  ☆12Updated 3 months ago
• openXC7 / toolchain-installer
  Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7
  ☆64Updated 6 months ago
• Wren6991 / DOOMSoC
  A SoC for DOOM
  ☆16Updated 3 years ago