YoWASP / vscodeLinks
YoWASP toolchain for Visual Studio Code
☆20Updated 2 weeks ago
Alternatives and similar repositories for vscode
Users that are interested in vscode are comparing it to the libraries listed below
Sorting:
- Another size-optimized RISC-V CPU for your consideration.☆58Updated last week
- Exploring gate level simulation☆58Updated 6 months ago
- 16 bit RISC-V proof of concept☆24Updated last month
- Soft USB for LiteX☆50Updated last month
- snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support☆29Updated last year
- yosys, nextpnr, apicula and openFPGALoader in vscode using OSS-CAD-Suite☆36Updated last year
- Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…☆72Updated last month
- Example Verilog code for Ulx3s☆42Updated 3 years ago
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- FLIX-V: FPGA, Linux and RISC-V☆41Updated 2 years ago
- Patched sources/configs for RISC-V Linux with musl-based toolchain targeting 8 MB RAM☆24Updated 3 years ago
- 5-stage RISC-V CPU, originally developed for RISCBoy☆33Updated 2 years ago
- J-Core J2/J32 5 stage pipeline CPU core☆54Updated 4 years ago
- Experiments with Yosys cxxrtl backend☆50Updated 9 months ago
- Open source Logic Analyzer based on LiteX SoC☆26Updated 6 months ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated 11 months ago
- iCE40HX8K development board with SRAM and bus for fast ADC, DAC, IOs☆38Updated last year
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆65Updated 5 months ago
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆101Updated 2 years ago
- Unofficial Yosys WebAssembly packages☆74Updated this week
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆32Updated last year
- Smol 2-stage RISC-V processor in nMigen☆26Updated 4 years ago
- Reusable Verilog 2005 components for FPGA designs☆48Updated 8 months ago
- ☆27Updated 5 years ago
- Graphics demos☆112Updated last year
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 4 years ago
- Design digital circuits in C. Simulate really fast with a regular compiler.☆173Updated this week
- A small and simple rv32i core written in Verilog☆15Updated 3 years ago
- simple wishbone client to read buttons and write leds☆19Updated last year