计算机组织与设计硬件软件接口 原书与伯克利大学哔哩哔哩视频课件
☆22May 13, 2022Updated 4 years ago
Alternatives and similar repositories for computer_organization_and_design_the_hardware_software_interface
Users that are interested in computer_organization_and_design_the_hardware_software_interface are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Parallel_Computer_Architecture经典书籍☆18May 13, 2022Updated 4 years ago
- a cyclic redundancy check(one kind of Error Correcting Code) software(MATLAB) and hardware(Verilog HDL) implementation.☆11Dec 14, 2019Updated 6 years ago
- ☆15Mar 19, 2025Updated last year
- YSYX RISC-V Project NJU Study Group☆16Jan 3, 2025Updated last year
- 增加密码学书籍☆44May 28, 2022Updated 4 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- P4_16 reference compiler☆23Dec 30, 2025Updated 9 months ago
- [NLP] A english to chinese translator using Transformer structure☆15Jul 26, 2024Updated 2 years ago
- This is a simple VLIW based processor written in Verilog. A Python script has also been included to simulate static instruction schedulin…☆19May 14, 2021Updated 5 years ago
- FreeRTOS BSP for Boundary Devices platforms☆12Mar 14, 2025Updated last year
- FFT algorithm for fpga☆26Aug 17, 2021Updated 5 years ago
- okl4 git for porting to realview_eb RTSM platform☆15Oct 17, 2012Updated 13 years ago
- A debugger / emulator for Ghidra☆15Oct 30, 2019Updated 6 years ago
- Miscellanious projects during 2014-2018 in Dept. of Electronic Engineering, Tsinghua University☆28Mar 29, 2019Updated 7 years ago
- 🖥️ A collection of SystemVerilog modules and Assembly programs. This repo includes examples of decoders, encoders, binary adders, and in…☆19Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This crate contains the BIOS API and common routines for all Neotron systems.☆11Feb 4, 2024Updated 2 years ago
- 本工具用于自动生成一个Wallace Tree算法VerilogHDL代码实例,并附带了一些配套的工具和一个完整的VerilogHDL描述的乘法器。☆27Jun 1, 2023Updated 3 years ago
- Simple library to interface with Hitachi-compatible character LCDs for the Sipeed Tang Nano 4K Gowin FPGA board.☆10Aug 13, 2022Updated 4 years ago
- LVGL ported to Ambiq Apollo series SoC, including various display and touchpad drivers☆20Jul 17, 2026Updated 2 months ago
- Load bitstream to AG1K series FPGA using CH552☆12Nov 19, 2021Updated 4 years ago
- 这是武汉大学WHU 计算机组成与设计 RISC-V CPU 流水线设计,包括Modelsim仿真测试,vivado下FPGA(NEXYS A7)测试。☆32May 21, 2024Updated 2 years ago
- A text-to-text encoding to make all characters have the same number of occurences☆12Mar 28, 2016Updated 10 years ago
- GDB Stub for RT-Thread(already in RT-Thread master)☆17Jan 10, 2015Updated 11 years ago
- Vincent SC (OpenGL SC Software Renderer)☆10Oct 18, 2013Updated 12 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- An attempt to reverse engineer a bitstream made for an AL3-10 FPGA☆16Jan 6, 2023Updated 3 years ago
- a Prometheus exporter for the LYWSD03MMC BLE thermometer☆16Dec 11, 2023Updated 2 years ago
- Learn and build GPU RTL from scratch☆22Aug 1, 2025Updated last year
- learn about computer architecture☆44May 6, 2024Updated 2 years ago
- Intel i40e driver (git repo out of official tarballs)