基于FPGA的交通灯
☆21Dec 21, 2018Updated 7 years ago
Alternatives and similar repositories for Traffic-lights-ce
Users that are interested in Traffic-lights-ce are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 基于FPGA实现的流水灯项目☆10Mar 19, 2018Updated 8 years ago
- ☆25Jun 17, 2014Updated 12 years ago
- 基于FPGA实验板的多功能数字时钟。利用Quartus实现设计与 仿真☆15May 23, 2023Updated 3 years ago
- ❤️ This is a Xilinx_FPGA _Spartan6 project for modulation 2ASK QPSK ADC DAC ROM SCI☆18Mar 28, 2018Updated 8 years ago
- EE 272B - VLSI Design Project☆15Jun 24, 2021Updated 5 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- 基于proteus8的51单片机的交通灯仿真☆14Apr 24, 2021Updated 5 years ago
- 基于FPGA的数字调制系统 ：实现m序列作为信源，并通过按键来选择移位相加的初始值和步进值以及实现2ASK、2FSK、2PSK☆26Jun 4, 2021Updated 5 years ago
- 基于FPGA的数字时钟（Modelsim仿真）☆29May 22, 2018Updated 8 years ago
- 用Verilog语言编写，实现2FSK，2PSK, 2DPSK, QPSK调制解调☆44Mar 15, 2019Updated 7 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆33May 6, 2017Updated 9 years ago
- 毕业设计：基于STM32的智能停车场设计☆21Jan 31, 2020Updated 6 years ago
- 基于STM32的老人摔倒报警装置☆22Aug 22, 2020Updated 6 years ago
- 10_100_1000 Mbps tri-mode ethernet MAC☆11Jul 17, 2014Updated 12 years ago
- 同济大学计算机网络课程设计大作业.（题目三，2023）The Assignment of Computer Network Course Design in Tongji University Selected the 3rd Question.☆23Sep 4, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆15Jul 5, 2020Updated 6 years ago
- BlueDBM hw/sw implementation using the bluespecpcie PCIe library☆12Dec 25, 2022Updated 3 years ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- 本项目是一个基于RISC-V指令集架构的向量处理器(Vector Processing Unit, VPU)设计，旨在实现RISC-V向量扩展(RVV)规范中定义的向量运算功能。涵盖了处理器设计、计算机体系结构和硬件描述语言编程等多个领域的知识。☆21May 8, 2025Updated last year
- RTL Verilog library for various DSP modules☆102Feb 17, 2022Updated 4 years ago
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- ☆13Sep 8, 2017Updated 9 years ago
- Implementation of NM sparsity recipe presented in the paper "Progressive Gradient Flow for Robust N:M Sparsity Training in Transformers".☆11Feb 5, 2024Updated 2 years ago
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- MT29F128G based NAND flash controller☆10Jun 17, 2021Updated 5 years ago
- A Fractional Divider with Delta-Sigma Modulator and Dual-Mode Divider for Phase-Locked Loop☆16Apr 25, 2021Updated 5 years ago
- a multiplier÷r verilog RTL file for RV32M instructions☆14Mar 17, 2020Updated 6 years ago
- RTL Design and Implementation of High Performance Algorithm Logic Units☆15Oct 1, 2019Updated 7 years ago
- ☆14Aug 26, 2016Updated 10 years ago
- ☆44Jul 28, 2025Updated last year
- ASIC Design of the openSPARC Floating Point Unit☆17Mar 13, 2017Updated 9 years ago
- An up-to-date & curated list of awesome semi-supervised segmentation papers, methods & resources.☆13Dec 22, 2023Updated 2 years ago
- 位 宽和深度可定制的异步FIFO☆14May 29, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- LMS-Adaptive Filter implement using verilog and Matlab☆51Oct 21, 2016Updated 9 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated last year
- 本项目基于Xilinx ZYNQ-7020开发板，实现了一个实时音频处理与分类系统，实现对人声、纯音乐的实时分类识别，同时可以对音频波形进行识别分类，目前可以识别正弦波、锯齿波、矩形波，并给出它们的基频频率，分辨率为11Hz。系统以48kHz的采样率捕获音频信号，在FPGA…☆16Feb 5, 2026Updated 8 months ago
- How to use the Intel JTAG primitive without using virtual JTAG☆17Oct 31, 2021Updated 4 years ago
- IOb_SoC version of the Picorv32 RISC-V Verilog IP core☆15Sep 21, 2026Updated 2 weeks ago
- 东南大学信息学院大三短学期FPGA课程设计——售货机☆28Apr 2, 2019Updated 7 years ago
- Wraps the NVDLA project for Chipyard integration☆24Sep 2, 2025Updated last year