DOOKNET / Digital_ClockLinks
基于FPGA的数字时钟(Modelsim仿真)
☆24Updated 7 years ago
Alternatives and similar repositories for Digital_Clock
Users that are interested in Digital_Clock are comparing it to the libraries listed below
Sorting:
- 复旦大学 数字逻辑与部件设计实验 2020秋☆50Updated 3 years ago
- 单周期 8指令 MIPS32CPU☆91Updated 2 years ago
- risc-v 单周期和流水线cpu设计, 基于miniRV-1指令集,语言verilog☆8Updated 2 years ago
- FPGA实现各种小游戏,学习并快乐着☆75Updated 3 years ago
- 车牌识别,FPGA,2019全国大学生集成电路创新创业大赛☆140Updated 5 years ago
- riscv指令集,单周期以及五级流水线CPU☆77Updated 6 months ago
- Uart transport + image processing + VGA display 基于FPGA的图像处理,包括Uart和VGA☆14Updated 5 years ago
- Mips五级流水线CPU☆41Updated 2 years ago
- 基于Verilog实现的三个MIPS架构CPU项目,按顺序实现了单周期,多周期以及基于多周期的微系统. Three Verilog-based MIPS CPU projects, simulate pipelined cpu based on mips instructi…☆16Updated 4 years ago
- njtech digital design. a fpga digital alarm system with Nexys A7 100T☆48Updated 6 years ago
- 基于FPGA,VGA,声音传感器与温湿度传感器实现的智能可控数字钟。☆10Updated 4 years ago
- 数字IC设计笔试相关的一些电路代码☆10Updated last year
- 记录一下夏季学期计算机设计与实践课上写的RISC-V单周期CPU和RISC-V五级流水线CPU☆13Updated 3 years ago
- MP3 Player developed on FPGA(DIGILENT NEXYS 4 DDR)☆17Updated 6 years ago
- 基于Verilog实现的全数字锁相环☆37Updated 3 years ago
- A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.☆23Updated last year
- 我设计了一些数字集成电路的教学实验,供大家学习~☆26Updated 5 months ago
- 重庆大学计算机组成原理、硬件综合设计实验材料☆38Updated 4 years ago
- This project uses verilog to implement interaction with OV2640 camera, Bluetooth slave module and VGA display on FPGA.☆54Updated 4 years ago
- 单周期CPU设计与实现☆14Updated 2 years ago
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛(高云赛道)项目,题目基于高云FPGA的多路网络视频监控编码系统。☆47Updated last year
- FPGA的学习路线与书籍整理☆48Updated 2 years ago
- 同济大学22级数字逻辑大作业☆31Updated 8 months ago
- 【原创,已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计,FPGA三级存储子系统。☆115Updated 5 years ago
- 从零开始设计一个CPU (Verilog)☆58Updated 4 years ago
- 一些关于模拟集成电路设计的相关学习文档☆22Updated 2 years ago
- 🔥华中科技大学电信专业 课程资料 作业 代码 实验报告 HUSTEIC 课程分享计划☆97Updated 3 years ago
- Integrated_Circuits_and_Semiconductor 集成电路设计与半导体物理器件书籍☆97Updated 3 years ago
- Greedy Snake game on Nexys 4 DDR with Verilog.☆28Updated 3 years ago
- ☆221Updated 4 years ago