CSUS-LLVM / OptSchedLinks
Optimizing scheduler. Combinatorial instruction scheduling project.
☆28Updated 3 weeks ago
Alternatives and similar repositories for OptSched
Users that are interested in OptSched are comparing it to the libraries listed below
Sorting:
- An out-of-tree MLIR dialect template.☆110Updated last year
- Bridging polyhedral analysis tools to the MLIR framework☆117Updated 2 years ago
- HeteroCL-MLIR dialect for accelerator design☆42Updated last year
- ☆118Updated last week
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆64Updated last year
- ☆40Updated last month
- ☆65Updated 6 years ago
- Data-Centric MLIR dialect☆43Updated 2 years ago
- development repository for the open earth compiler☆80Updated 4 years ago
- Polyhedral High-Level Synthesis in MLIR☆34Updated 2 years ago
- EQueue Dialect☆41Updated 3 years ago
- UniSparse: An Intermediate Language for General Sparse Format Customization (OOPSLA'24)☆32Updated last year
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆51Updated this week
- tutorials about polyhedral compilation.☆56Updated last month
- ☆38Updated 3 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆24Updated last year
- IREE plugin repository for the AMD AIE accelerator☆113Updated last week
- ☆16Updated this week
- Generator for MLIR files from known front-ends☆16Updated 2 years ago
- PolyBench/C benchmark suite (version 4.2.1 beta) from http://web.cse.ohio-state.edu/~pouchet/software/polybench/☆123Updated 9 years ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆52Updated 2 years ago
- A retargetable and extensible synthesis-based compiler for modern hardware architectures☆13Updated last week
- Performance Prediction Toolkit for GPUs☆39Updated 3 years ago
- We solve the two challenges architects face when designing heterogeneous processors with cache coherent shared memory. First, we develop …☆20Updated 3 years ago
- MLIR+EqSat☆21Updated 3 months ago
- TPP experimentation on MLIR for linear algebra☆139Updated last week
- ☆17Updated last month
- Asynchronous semantics for architectural simulation and synthesis.☆56Updated this week
- Simulator code of the paper "Dissecting and Modeling the Architecture of Modern GPU Cores"☆41Updated last month
- ☆61Updated last week