实现一个基础但功能完善的计算机系统,根据《自己动手写CPU》实现,开发板为Nexys4 DDR
☆34Mar 10, 2024Updated 2 years ago
Alternatives and similar repositories for OpenMIPS
Users that are interested in OpenMIPS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- TJ 计算机系统实验: 89条指令CPU☆12Nov 11, 2024Updated last year
- 實作《自己動手寫CPU》書上的程式碼☆69Sep 16, 2018Updated 7 years ago
- 简单改造了自己动手实现CPU的代码☆10Apr 23, 2021Updated 5 years ago
- upgrade to e203 (a risc-v core)☆46Aug 9, 2020Updated 5 years ago
- ☆25Jan 22, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- 同济2022抗击疫情实录。☆35Apr 27, 2022Updated 4 years ago
- NSCSCC 2020 - Yet Another MIPS Processor☆14Aug 7, 2021Updated 4 years ago
- This project uses verilog to implement interaction with OV2640 camera, Bluetooth slave module and VGA display on FPGA.☆60Dec 13, 2020Updated 5 years ago
- fpga based nes box☆34Nov 9, 2021Updated 4 years ago
- 【原创,已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计,FPGA三级存储子系统。☆120Jul 12, 2020Updated 5 years ago
- 同济助手Chrome插件,能自动登录同济的各种网站,还有邮箱登录、选课辅助、评教辅助、电费提醒等功能(⊙v⊙)~ 另,开发者已经毕业了正在考虑传承问题,优先考虑19、20级能理解项目绝大部分代码的同学,可通过z@zhouii.com联系我☆225Jul 12, 2021Updated 4 years ago
- A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…☆84Jun 5, 2019Updated 6 years ago
- 同济大学CS《计算机系统实验》实验二TongJi University CS computer system experiment assignment 2《自己动手写 CPU》SOPC实现与操作系统移植☆26Jun 3, 2023Updated 2 years ago
- ☆20Jul 3, 2025Updated 10 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- FPGA controller for SSD1306 OLED module on SPI. Optimised for GOWIN FPGA☆16Oct 11, 2018Updated 7 years ago
- 通过学习《自己动手写CPU》,将书中实现的兼容MIPS32指令集架构的处理器——OpenMIPS(五级流水线结构),简化成单指令周期实现的处理器☆210Mar 2, 2022Updated 4 years ago
- The classifier of Superpower(from Tongji University) used in Robomaster2019. 19k FPS on NUC.☆11Sep 20, 2020Updated 5 years ago
- FIR,FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- This project aims at developing working kernels for Amazfit watches☆10Nov 20, 2019Updated 6 years ago
- This is a simple Risc-v core for software simulation on FPGA.☆10Apr 9, 2022Updated 4 years ago
- Project for CS101016 and CS100160, Tongji University. Use Verilog HDL to build a CPU.☆10Mar 20, 2021Updated 5 years ago
- This is Max's blog, something interesting in it.☆13Jan 1, 2023Updated 3 years ago
- 2017秋季学期计组实验,含54条单周期CPU☆28Dec 3, 2018Updated 7 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- CORE-V eXtension Interface compliant RISC-V [F|Zfinx] Coprocessor☆15Nov 12, 2025Updated 6 months ago
- 同济大学计算机科学与技术、信息安全专业课程资源共享仓库。含部分科目介绍、报告模板、实验工具等内容。期待更多课程加入……☆417Mar 7, 2026Updated 2 months ago
- Simple RiscV core for academic purpose.☆23Apr 29, 2020Updated 6 years ago
- 该文档是个人阅读学习蜂鸟E203源码的笔记☆13Aug 1, 2023Updated 2 years ago
- 分享收集的在算法竞赛、数据结构方面的课件、论文、书籍、OJ网站、习题。☆14May 21, 2020Updated 6 years ago
- ☆11Jun 28, 2020Updated 5 years ago
- Datasheets of Ingenic SoCs. Distribute as you want!☆22Sep 16, 2024Updated last year
- simple RISC-V 64bit emulator, which can boot linux kernel.☆12Oct 16, 2023Updated 2 years ago
- 一个JPEG有损图像压缩编码器☆13May 22, 2023Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- 《自己动手写CPU》一书附带的文件☆87Mar 1, 2018Updated 8 years ago
- A 32-bit MIPS processor which aims for conformance to the MIPS32 Release 1 ISA. This is a bare-metal CPU with no virtual memory. (Old Uni…☆62Jul 29, 2015Updated 10 years ago
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆13Aug 26, 2024Updated last year
- 基于易灵思Ti60F225开发板和MT9M001双目摄像头,使用Verilog语言完成的双目拼接项目。摄像头输入图像数据后,在使用FAST计算图像特征点的同时,构建滑动窗口计算图像各个像素点的BRIEF描述符,完成后根据BRIEF描述符对两幅图像上的特征点进行暴力匹配,最后…☆21Apr 16, 2025Updated last year
- 本项目总结了笔者大学实习和暑期夏令营二十余场面试的经验,旨在指导如何从零开始准备自己的简历、实习和夏令营面试笔试。☆144May 11, 2021Updated 5 years ago
- ☆15Aug 20, 2019Updated 6 years ago
- NTU Computer Architecture 2021 - CPU with Single issue, L1-cache☆11Jan 24, 2022Updated 4 years ago