aosp-riscv / working-group
meta repo for AOSP for RISC-V Project. General tasks and issues here.
☆109Updated 5 months ago
Related projects ⓘ
Alternatives and complementary repositories for working-group
- ☆65Updated last year
- Patches & Script for AOSP to run on Xuantie RISC-V CPU☆465Updated 5 months ago
- GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……☆90Updated 4 months ago
- Freedom U540-C000 Bootloader Code☆85Updated 4 years ago
- Issues and discussions around RISC-V support in AOSP.☆226Updated 7 months ago
- Gunyah is a Type-1 hypervisor designed for strong security, performance and modularity.☆311Updated 10 months ago
- RISC-V Profiles and Platform Specification☆112Updated last year
- riscv64 d1-nezha baremeta(Allwinner D1 riscv chip)☆77Updated 2 years ago
- Valgrind with support for the RISCV64/Linux platform.☆56Updated 3 months ago
- ☆60Updated 3 years ago
- Training Materials for RISC-V HW/SW, focusing on compilers, emulators, and virtual machines. provided by PLCT Lab.☆33Updated 7 months ago
- Yet another Linux Distro for RISC-V!☆52Updated last week
- PLIC Specification☆133Updated last year
- C-SKY Linux Port☆72Updated 3 weeks ago
- KVM RISC-V HowTOs☆42Updated 2 years ago
- Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains☆145Updated last week
- ☆153Updated 3 weeks ago
- Freedom U Software Development Kit (FUSDK)☆276Updated last week
- Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)☆247Updated last week
- OpenEmbedded/Yocto layer for RISC-V Architecture☆366Updated 2 weeks ago
- Simple machine mode program to probe RISC-V control and status registers☆116Updated last year
- busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.☆95Updated 4 months ago
- Working draft of the proposed RISC-V Bitmanipulation extension☆204Updated 8 months ago
- Buildroot for T-HEAD XuanTie CPU Series☆111Updated 10 months ago
- Device Tree Compiler☆234Updated this week
- RISC-V Processor Trace Specification☆164Updated last week
- Tools for SiFive's Freedom Platform☆217Updated 3 years ago
- Port of MIT's xv6 OS to the Nezha RISC-V board with Allwinner D1 SoC☆96Updated last year
- Buildroot customized for Xuantie™ RISC-V CPU☆39Updated 2 years ago
- Tiny FEL tools for allwinner SOC, support RISC-V D1 chip☆239Updated 3 weeks ago