altera-opensource / u-boot-socfpga
Official Intel SOCFPGA U-Boot repository. Note: (1) A "RC" labeled branch is for internal active development use and customer early access without official customer support. (2) Latest stable branch (no RC labeled) is strongly recommended for development and production use outside of Intel. (3) See doc/README.socfpga for Quartus and Device suppo…
☆106Updated 2 weeks ago
Alternatives and similar repositories for u-boot-socfpga:
Users that are interested in u-boot-socfpga are comparing it to the libraries listed below
- Linux development repository for socfpga☆253Updated 2 weeks ago
- Collection of Yocto Project layers to enable AMD Xilinx products☆150Updated 3 weeks ago
- Yocto Project layer enables AMD Xilinx tools related metadata for MicroBlaze, Zynq, ZynqMP and Versal devices.☆57Updated 3 weeks ago
- meta-petalinux distro layer supporting Xilinx Tools☆87Updated 3 weeks ago
- Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)☆209Updated 3 months ago
- Repository containing releases of prebuilt GNU toolchains for DesignWare ARC Processors from Synopsys (available from "releases" link bel…☆96Updated 2 weeks ago
- This is a wiki and code sharing for ZYNQ☆71Updated 8 years ago
- ☆108Updated last week
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de1…☆160Updated last year
- ☆65Updated 7 months ago
- open-source SDKs for the SCR1 core☆71Updated 3 months ago
- ☆82Updated 7 years ago
- Example design for the Ethernet FMC using the hard GEMs of the Zynq☆54Updated 2 months ago
- an abstraction layer across user-space Linux, baremetal, and RTOS environments☆24Updated 3 months ago
- A simple script to build a PMU firmware for Xilinx ZynqMP☆33Updated 3 weeks ago
- Examples using the Cyclone V SoC chip☆106Updated 5 years ago
- Linux Driver for the Zynq FPGA DMA engine☆87Updated 10 years ago
- ☆21Updated 3 months ago
- Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or S…☆232Updated 9 months ago
- ☆121Updated last month
- Ethernet Example Projects targeting the Xilinx ZCU102 evaluation board. This repository replaces XAPP1305.☆59Updated this week
- u-boot-xarm from xilinx git repo with Digilent additions☆31Updated 6 months ago
- FreeRTOS with LwIP integration in the Nios II EDS☆19Updated 9 years ago
- Old Altera BSP layer for OpenEmbedded/Yocto Project ( please use https://github.com/altera-opensource/meta-intel-fpga-refdes)☆47Updated last year
- Example designs for FPGA Drive FMC☆232Updated last month
- Nuclei RISC-V Software Development Kit☆131Updated last month
- Linux Repository for digilent boards☆86Updated 2 months ago
- Repo Manifests for the Yocto Project Build System☆31Updated 3 weeks ago
- Repository used to support automated builds under PetaLinux tools that use Yocto.☆58Updated last week
- A port of FreeRTOS for the RISC-V ISA☆75Updated 5 years ago