Sodawyx / dnsSystem
A Simple DNS System -- Coursework of Internet Applications
☆19Updated 4 years ago
Related projects ⓘ
Alternatives and complementary repositories for dnsSystem
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆121Updated 4 months ago
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆64Updated 4 years ago
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- ☆52Updated last year
- Collect some IC textbooks for learning.☆100Updated 2 years ago
- 基于RISC_V32I指令集架构的五级流水CPU☆14Updated 5 years ago
- MIPS CPU☆14Updated 3 years ago
- NSCSCC 信息整合☆219Updated 3 years ago
- 为了更好地帮助后来的同学参加龙芯杯,草拟了这份建议,望对后来人有所帮助☆113Updated 4 years ago
- A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.☆15Updated 5 months ago
- 一生一芯CPU/目前做到总线之前/主要考虑ASIC DV☆12Updated last week
- 2022年龙芯杯个人赛 单发射110M(含icache)☆44Updated 2 years ago
- 一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .☆24Updated 2 years ago
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆46Updated 2 years ago
- A RISC-V RV32I ISA Single Cycle CPU☆20Updated last year
- The personal processor core of One Student One Chip project. It is a single-issue, five-stage pipelined sequential processor core based …☆20Updated last month
- ☆76Updated 2 months ago
- ☆42Updated 3 months ago
- 体系结构研讨 + ysyx高阶大纲 (WIP☆114Updated 3 weeks ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆40Updated 4 years ago
- A small SoC with a pipeline 32-bit RISC-V CPU.☆62Updated 2 years ago
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆48Updated 8 months ago
- CPU Design Based on RISCV ISA☆75Updated 4 months ago
- Educational materials for RISC-V☆6Updated 4 years ago
- verilog module add prefix script 可用于ysyx项目添加学号☆13Updated 8 months ago
- 复旦大学 数字逻辑与部件设计实验 2020秋☆42Updated 2 years ago
- 实现一个基础但功能完善的计算机系统,根据《自己动手写CPU》实现,开发板为Nexys4 DDR☆32Updated 8 months ago
- ☆31Updated last year