SSoelvsten / bdd-benchmark
Benchmarking Suite for BDD packages
☆14Updated 3 months ago
Alternatives and similar repositories for bdd-benchmark:
Users that are interested in bdd-benchmark are comparing it to the libraries listed below
- An I/O-efficient implementation of (Binary) Decision Diagrams☆27Updated this week
- Concurrent decision diagram framework written in Rust☆57Updated last week
- IC3 reference implementation: a short, simple, fairly competitive implementation of IC3. Read it, tune it, extend it, play with it.☆56Updated 9 years ago
- Pono: A flexible and extensible SMT-based model checker☆92Updated 3 weeks ago
- ☆11Updated 7 years ago
- Reads a state transition system and performs property checking☆76Updated last week
- SMTSampler: Efficient Stimulus Generation from Complex SMT Constraints☆24Updated 5 years ago
- Hardware Model Checker☆36Updated last week
- Solver for Constrained Horn Clauses☆36Updated this week
- ☆34Updated 7 months ago
- Implementation of multi-core (binary) decision diagrams☆71Updated 9 months ago
- Random Generator of Btor2 Files☆9Updated last year
- AMulet 2. - A better AIG Multiplier Examination Tool☆23Updated 2 years ago
- The HW-CBMC and EBMC Model Checkers for Verilog☆65Updated last week
- A generic C++ API for SMT solving. It provides abstract classes which can be implemented by different SMT solvers.☆120Updated last week
- BTOR2 MLIR project☆23Updated last year
- A hardware model checker for hyperproperties☆18Updated 8 months ago
- Multi-core Decision Diagram (BDD/LDD) implementation☆42Updated last year
- ☆14Updated 2 years ago
- CAQE is a solver for quantified Boolean formulas☆31Updated last year
- This repository contains the code of Intel(R) SAT Solver (IntelSAT)☆28Updated this week
- A fork of the Kissat SAT solver with additional features. Supports incremental solving.☆13Updated 2 years ago
- The source code to the Voss II Hardware Verification Suite☆56Updated this week
- ☆15Updated 11 months ago
- A generic parser and tool package for the BTOR2 format.☆40Updated 2 months ago
- Bit-bLAsting solving Non-linear integer constraints.☆21Updated 7 months ago
- The VerCors verification toolset for verifying parallel and concurrent software☆69Updated this week
- Cube-and-Conquer SAT solver☆32Updated last year
- Verilog development and verification project for HOL4☆25Updated 4 months ago
- PolyGen is a code generator for the polyhedral model, written and proved in Coq.☆10Updated 4 years ago