Alternatives and similar repositories for MCHyper

Users that are interested in MCHyper are comparing it to the libraries listed below

• arbrad / IC3ref
  IC3 reference implementation: a short, simple, fairly competitive implementation of IC3. Read it, tune it, extend it, play with it.
  ☆59Updated 10 years ago
• chc-comp / chc-tools
  Tools for manipulating CHC and related files
  ☆15Updated 2 years ago
• mgudemann / iimc
  ☆14Updated 7 years ago
• CoriolisSP / FuzzBtor2
  Random Generator of Btor2 Files
  ☆10Updated last year
• MarkusRabe / cadet
  A fast and certifying solver for quantified Boolean formulas.
  ☆26Updated 3 months ago
• arminbiere / gimsatul
  ☆34Updated 3 weeks ago
• jar-ben / mustool
  ☆15Updated 2 years ago
• formalmethods / intrepid
  Intrepyd Model Checker
  ☆18Updated 3 years ago
• stanford-centaur / pono
  Pono: A flexible and extensible SMT-based model checker
  ☆107Updated this week
• gipsyh / rIC3-HWMCC24
  rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission
  ☆12Updated last month
• Formal-Systems-Laboratory / ROSRV
  ☆15Updated 4 years ago
• lijwen2748 / simplecar
  ☆15Updated 2 years ago
• arminbiere / runlim
  ☆16Updated last year
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆26Updated last year
• zhoulaifu / xsat
  A Fast Floating-Point Satisfiability Solver
  ☆29Updated 3 weeks ago
• aman-goel / avr
  Reads a state transition system and performs property checking
  ☆85Updated 5 months ago
• utwente-fmt / sylvan
  Multi-core Decision Diagram (BDD/LDD) implementation
  ☆44Updated last year
• martinjonas / Q3B
  ☆29Updated 2 weeks ago
• eytans / easter-egg
  easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once
  ☆13Updated 4 months ago
• yaohsiaopid / rtl2uspec
  ☆11Updated last month
• niklasso / tip
  A model checker based on SAT solving and induction
  ☆14Updated 10 years ago
• CakeML / hardware
  Verilog development and verification project for HOL4
  ☆27Updated 3 months ago
• RafaelTupynamba / SMTSampler
  SMTSampler: Efficient Stimulus Generation from Complex SMT Constraints
  ☆29Updated 5 years ago
• rajdeep87 / verilog-c
  ANSI-C benchmarks generated from Verilog RTL circuits with safety assertions. Used for Formal Property Verification.
  ☆15Updated 6 years ago
• cvc5 / ethos
  A Flexible and Efficient Proof Checker for SMT Solvers
  ☆25Updated last week
• diffblue / hw-cbmc
  The HW-CBMC and EBMC Model Checkers for Verilog
  ☆81Updated this week
• ymherklotz / vericert
  A formally verified high-level synthesis tool based on CompCert and written in Coq.
  ☆93Updated last year
• lonsing / depqbf
  DepQBF, a solver for quantified boolean formulae (QBF).
  ☆36Updated 2 years ago
• aman-goel / ic3po
  IC3PO: IC3 for Proving Protocol Properties
  ☆28Updated 11 months ago
• usi-verification-and-security / golem
  Solver for Constrained Horn Clauses
  ☆44Updated this week