Alternatives and similar repositories for v8-riscv:

Users that are interested in v8-riscv are comparing it to the libraries listed below

• hellogcc / OSDT-Slides
  OSDT社区（HelloGCC、HelloLLVM）组织的活动中的报告
  ☆46Updated 4 years ago
• ISRC-CAS / c910-llvm
  平头哥玄铁C910的LLVM工具链支持，由PLCT实验室提供，非官方版本
  ☆63Updated 3 years ago
• Lichtso / riscv-llvm-templates
  Code templates to get started experimenting with the RISC-V LLVM toolchain
  ☆13Updated 6 years ago
• Jonathan2251 / lbt
  Develop toolchain based on llvm to for Cpu0 processor
  ☆45Updated last year
• plctlab / llvm-project
  PLCT实验室的 RISC-V V Spec 实现，基于llvm/llvm-project，rkruppe/rvv-llvm 和 https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi-0.8
  ☆160Updated 2 months ago
• hellollvm / website
  website of hellollvm.org
  ☆38Updated last year
• ksco / chibicc-riscv
  A fork of chibicc ported to RISC-V assembly.
  ☆38Updated 2 years ago
• ucb-bar / esp-llvm
  UCB-BAR fork of LLVM! NOT UPSTREAM RISCV LLVM
  ☆124Updated 4 years ago
• sifive / riscv-llvm
  SiFive's LLVM working tree
  ☆85Updated 7 months ago
• plctlab / RISCV-Training
  Training Materials for RISC-V HW/SW, focusing on compilers, emulators, and virtual machines. provided by PLCT Lab.
  ☆34Updated 10 months ago
• elongbug / llvm-cookbook
  llvm-cookbook samples
  ☆79Updated 7 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆75Updated this week
• fmash16 / riscv_emulator
  A basic working RISCV emulator written in C
  ☆64Updated last year
• alibaba / xoc
  XOC is a compiler infrastructure that provides multi-level operations, flexibility, and the capability of representing almost all popular…
  ☆110Updated 7 years ago
• zetalog / sdfirm
  Ultra light weight small device firmware. Well architected to support MMU, SMP, low power idle. Can be run on various CPU architectures.
  ☆15Updated 6 months ago
• hellollvm / nanpanjiang-project
  由HelloLLVM社区主席邱吉博士发起，联合HelloGCC等技术社区，推出了「南盘江计划」，致力于帮助更多的女性工程师在编译等基础软件领域实现个人职业目标。
  ☆29Updated last year
• Minres / DBT-RISE-RISCV
  An instruction set simulator based on DBT-RISE implementing the RISC-V ISA
  ☆35Updated 4 months ago
• stevenknown / xocfe
  XOCFE is an concise, clearly, C compiler frontend, it is easy to understand and modify. XOCFE's input is pure C, output is an AST tree.
  ☆52Updated last week
• stevenknown / xoc
  XOC is a compiler infrastructure that provides multi-level operations, flexibility, and the capability of representing almost all popular…
  ☆115Updated last week
• ria-jit / ria-jit
  Lightweight and performant dynamic binary translation for RISC–V code on x86–64
  ☆60Updated 3 years ago
• hellogcc / OSDT2018
  开源开发工具大会OSDT2018报告PPT等资料
  ☆19Updated 5 years ago
• cnrv / RVWC2021-slides
  第一届 RISC-V 中国峰会的幻灯片等资料存放
  ☆37Updated 2 years ago
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆141Updated last year
• LvNA-system / labeled-RISC-V
  ☆169Updated 3 years ago
• litmus-tests / litmus-tests-riscv
  RISC-V architecture concurrency model litmus tests
  ☆74Updated last year
• frasercrmck / llvm-leg
  ☆107Updated 3 years ago
• cnrv / RISCV-East-Asia-Biweekly-Sync
  Biweekly Sync Meeting for RISC-V Software Ecosystem. Meeting time is more friendly for people living in East Asia.
  ☆23Updated 2 months ago
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆147Updated 2 years ago
• jserv / jit-construct
  JIT compiler from scratch, derived from Nick Desaulniers' great work
  ☆43Updated 4 years ago
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆148Updated this week