BlusLiu / Flappy-Bird
FPGA program :VGA-GAME
☆25Updated 6 years ago
Alternatives and similar repositories for Flappy-Bird:
Users that are interested in Flappy-Bird are comparing it to the libraries listed below
- 【原创,已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计,FPGA三级存储子系统。☆110Updated 4 years ago
- 实现一个基础但功能完善的计算机系统,根据《自己动手写CPU》实现,开发板为Nexys4 DDR☆33Updated last year
- This project uses verilog to implement interaction with OV2640 camera, Bluetooth slave module and VGA display on FPGA.☆57Updated 4 years ago
- Verilog实现的简单五级流水线CPU,开发平台:Nexys3☆39Updated 9 years ago
- 奋战一学期,造台计算机(编译出的bit文件在release中,可以直接食用)☆126Updated 5 years ago
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆72Updated 5 years ago
- 基于RISC_V32I指令集架构的五级流水CPU☆14Updated 5 years ago
- 《自己动手写CPU》一书附带的文件☆79Updated 7 years ago
- Uranus MIPS processor by MaxXing & USTB NSCSCC team☆38Updated 5 years ago
- Verilog实现单周期非流水线32位RISCV指令集(45条)CPU☆38Updated 4 years ago
- 为了更好地帮助后来的同学参加龙芯杯,草拟了这份建议,望对后来人有所帮助☆122Updated 4 years ago
- ☆14Updated 4 years ago
- FPGA实现各种小游戏,学习并快乐着☆70Updated 2 years ago
- 2017秋季学期计组实验,含54条单周期CPU☆25Updated 6 years ago
- Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC(精简指令集)CPU(中央处理器)简单结构和Verilog实现。☆142Updated 6 years ago
- MP3 Player developed on FPGA(DIGILENT NEXYS 4 DDR)☆18Updated 6 years ago
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- ☆34Updated 5 years ago
- 用verilog设计8位cpu☆7Updated 4 years ago
- A softcore microprocessor of MIPS32 architecture.☆39Updated 8 months ago
- NSCSCC 信息整合☆232Updated 4 years ago
- Naïve MIPS32 SoC implementation☆113Updated 4 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆42Updated 4 years ago
- Computer System Project for Loongson FPGA Board in 2017☆52Updated 6 years ago
- Nexys 4 DDR Artix-7☆10Updated 6 years ago
- Uart transport + image processing + VGA display 基于FPGA的图像处理,包括Uart和VGA☆15Updated 5 years ago
- 中国科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session☆32Updated 7 years ago
- 通过学习《自己动手写CPU》,将书中实现的兼容MIPS32指令集架构的处理器——OpenMIPS(五级流水线结构),简化成单指令周期实现的处理器☆195Updated 3 years ago
- 单周期 8指令 MIPS32CPU☆89Updated 2 years ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆124Updated 8 months ago