slap-flop / slap-artifactsLinks
This upload contains the artifacts for the paper "SLAP: Data Speculation Attacks via Load Address Prediction on Apple Silicon", to appear at the 2025 IEEE Symposium on Security and Privacy.
☆22Updated 11 months ago
Alternatives and similar repositories for slap-artifacts
Users that are interested in slap-artifacts are comparing it to the libraries listed below
Sorting:
- ☆19Updated 2 years ago
- Artifact of "Indirector: High-Precision Branch Target Injection Attacks Exploiting the Indirect Branch Predictor" [USENIX Security 2024]☆64Updated last year
- Using Data Memory-Dependent Prefetchers to Leak Data at Rest☆38Updated 3 years ago
- ☆30Updated last year
- Pathfinder: High-Resolution Control-Flow Attacks Exploiting the Conditional Branch Predictor☆21Updated last year
- Proof-of-concept code for the IEEE S&P 2025 paper "Peek-a-Walk: Leaking Secrets via Page Walk Side Channels"☆30Updated 5 months ago
- Proof-of-concept implementation for the paper "Efficient and Generic Microarchitectural Hash-Function Recovery" (IEEE S&P 2024)☆31Updated 2 years ago
- InSpectre Gadget: in-depth inspection and exploitability analysis of Spectre disclosure gadgets☆58Updated last month
- Artifact for the IEEE S&P 2025 paper: "Rapid Reversing of Non-Linear CPU Cache Slice Functions: Unlocking Physical Address Leakage"☆15Updated last month
- Defeating Pointer Authentication on the Apple M1 with Hardware Attacks☆48Updated 3 years ago
- Patch your macOS kernel to enable support for the high-resolution timers on M1☆36Updated 7 months ago
- Training in Transient Execution and PhantomCALL, from Inception (SEC'23) Artifacts.☆41Updated last year
- TikTag: Breaking ARM's Memory Tagging Extension with Speculative Execution (IEEE S&P 2025)☆85Updated last year
- Implementation for the DIMVA'22 paper "Branch Different - Spectre Attacks on Apple Silicon"☆37Updated 3 years ago
- Materials from the DEF CON 30 talk on PACMAN☆34Updated 3 years ago
- ☆42Updated 2 years ago
- Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)☆65Updated 6 months ago
- HW interface for memory caches☆28Updated 5 years ago
- Proof-of-concept implementation for the paper "CacheWarp: Software-based Fault Injection using Selective State Reset" (USENIX Security 20…☆63Updated last year
- Constantine is a compiler-based system to automatically harden programs against microarchitectural side channels☆82Updated last month
- Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation☆48Updated 8 months ago
- Using Malicious #VC Interrupts to Break AMD SEV-SNP (IEEE S&P 2024)☆25Updated last year
- Artefacts for: "VMScape: Exposing and Exploiting Incomplete Branch Predictor Isolation in Cloud Environments"☆32Updated 2 months ago
- Open-source release of "Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud" (ASPLOS '24)☆33Updated 9 months ago
- Proof-of-concept implementation for the paper "Indirect Meltdown: Building Novel Side-Channel Attacks from Transient Execution Attacks" (…☆22Updated 2 years ago
- The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…☆22Updated 2 years ago
- Medusa Repository: Transynther tool and Medusa Attack☆23Updated 5 years ago
- ☆17Updated 3 years ago
- Opening Pandora's Box: A Systematic Study of New Ways Microarchitecture can Leak Private Data☆20Updated 3 years ago
- Use hardware performance counters to find mapping of addresses to L3 slices in Intel processors☆17Updated 2 years ago