Alternatives and similar repositories for Indirector_Artifact:

Users that are interested in Indirector_Artifact are comparing it to the libraries listed below

• hoseinyavarzadeh / Pathfinder_Attack
  Pathfinder: High-Resolution Control-Flow Attacks Exploiting the Conditional Branch Predictor
  ☆16Updated 9 months ago
• flowyroll / medusa
  Medusa Repository: Transynther tool and Medusa Attack
  ☆21Updated 4 years ago
• FPSG-UIUC / augury
  Using Data Memory-Dependent Prefetchers to Leak Data at Rest
  ☆35Updated 2 years ago
• cispa / osiris
  Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)
  ☆57Updated 3 years ago
• vusec / inspectre-gadget
  InSpectre Gadget: in-depth inspection and exploitability analysis of Spectre disclosure gadgets
  ☆52Updated 2 weeks ago
• scy-phy / FetchBench
  ☆17Updated last year
• cispa / hammulator
  Proof-of-concept implementation for the paper "Hammulator: Simulate Now - Exploit Later" (DRAMSec 2023)
  ☆15Updated last year
• cispa / indirect-meltdown
  Proof-of-concept implementation for the paper "Indirect Meltdown: Building Novel Side-Channel Attacks from Transient Execution Attacks" (…
  ☆20Updated last year
• FPSG-UIUC / Pandora
  Opening Pandora's Box: A Systematic Study of New Ways Microarchitecture can Leak Private Data
  ☆20Updated 2 years ago
• cispa / regcheck
  Proof-of-concept implementation for the paper "Reviving Meltdown 3a" (ESORICS 2023)
  ☆14Updated last year
• isec-tugraz / msrevelio
  ☆36Updated last year
• cispa / Microarchitectural-Hash-Function-Recovery
  Proof-of-concept implementation for the paper "Efficient and Generic Microarchitectural Hash-Function Recovery" (IEEE S&P 2024)
  ☆28Updated last year
• amdprefetch / amd-prefetch-attacks
  ☆24Updated last year
• agra-uni-bremen / BinSym
  Symbolic execution for RISC-V machine code based on the formal LibRISCV ISA model
  ☆46Updated 3 months ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆65Updated last month
• CMU-SAFARI / RowPress
  Source code & scripts for experimental characterization and real-system demonstration of RowPress, a widespread read disturbance phenomen…
  ☆32Updated last year
• libtea / frameworks
  Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser
  ☆61Updated 2 years ago
• cgvwzq / cachequery
  HW interface for memory caches
  ☆26Updated 5 years ago
• badramattack / badram
  ☆54Updated last month
• isec-tugraz / prefetch
  This repository contains several tools to perform Prefetch Side-Channel Attacks
  ☆58Updated 8 years ago
• pietroborrello / constantine
  Constantine is a compiler-based system to automatically harden programs against microarchitectural side channels
  ☆73Updated 2 years ago
• IntelLabs / PreSiFuzz
  Pre-Silicon Hardware Fuzzing Toolkit
  ☆55Updated 2 weeks ago
• comsec-group / cascade-artifacts
  Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
  ☆126Updated 7 months ago
• sycuricon / MorFuzz
  Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
  ☆26Updated last year
• vusec / tlbdr
  ☆17Updated 2 years ago
• vusec / slam
  Spectre based on Linear Address Masking
  ☆68Updated last year
• vusec / kasper
  Kasper: Scanning for Generalized Transient Execution Gadgets in the Linux Kernel
  ☆58Updated 11 months ago
• IntelLabs / kafl.linux
  Linux kernel branches for confidential compute research
  ☆17Updated 3 weeks ago
• isec-tugraz / halfdouble
  ☆15Updated 2 years ago
• vusec / ghostrace
  ☆72Updated last year