Alternatives and similar repositories for microgpusim

Users that are interested in microgpusim are comparing it to the libraries listed below

• jackwadden / ANMLZoo
  High-performance automata-processing engines are traditionally evaluated using a limited set of regular expression rulesets. While regula…
  ☆32Updated last year
• andidr / teckyl
  An MLIR frontend for tensor expressions
  ☆25Updated 4 years ago
• ParCoreLab / ReuseTracker
  A fast and accurate reuse distance analyzer for multi-threaded applications. It leverages existing hardware features in commodity CPUs.
  ☆19Updated 2 years ago
• spcl / haystack
  Haystack is an analytical cache model that given a program computes the number of cache misses.
  ☆46Updated 6 years ago
• vegaluisjose / vast
  Verilog AST
  ☆21Updated last year
• sdiehl / mlir-egglog
  A toy compiler for NumPy array expressions that uses e-graphs and MLIR
  ☆56Updated last week
• gthparch / NVPTX-SPIRV-Translator
  ☆21Updated 3 years ago
• SamAinsworth / reproduce-cgo2017-paper
  Artifact Evaluation Reproduction for "Software Prefetching for Indirect Memory Accesses", CGO 2017, using CK.
  ☆38Updated 3 years ago
• vortexgpgpu / NVPTX-SPIRV-Translator
  The translator that supports translating NVPTX to SPIR-V. This translator is modified from LLVM-SPIR-V Translator.
  ☆40Updated 3 years ago
• cupbop / CuPBoP
  A framework that support executing unmodified CUDA source code on non-NVIDIA devices.
  ☆131Updated 6 months ago
• jackwadden / VASim
  VASim is a virtual homogeneous non-deterministic finite automata automata simulator and transformation tool. VASim can parse, transform, …
  ☆36Updated last year
• NVlabs / ptxmemorymodel
  ☆64Updated 6 years ago
• Synthesys-Lab / assassyn
  Asynchronous semantics for architectural simulation and synthesis.
  ☆39Updated this week
• alpaka-group / mallocMC
  mallocMC: Memory Allocator for Many Core Architectures
  ☆58Updated 2 months ago
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆44Updated last month
• IITH-Compilers / ML-Compiler-Bridge
  Library to interface Compilers and ML models for ML-Enabled Compiler Optimizations
  ☆18Updated last month
• makslevental / nelli
  A lightweight, Pythonic, frontend for MLIR
  ☆80Updated last year
• pasta-toolbox / bit_vector
  Fast and highly tuned bit vector implementation including space efficient rank and select support having only 3.51% space overhead.
  ☆30Updated 3 months ago
• ithemal / bhive
  ☆40Updated 3 years ago
• kumasento / polymer
  Bridging polyhedral analysis tools to the MLIR framework
  ☆116Updated last year
• uwplse / rake
  compiling DSLs to high-level hardware instructions
  ☆22Updated 2 years ago
• SakalisC / Splash-3
  The Splash-3 benchmark suite
  ☆44Updated 2 years ago
• gussmith23 / glenside
  A pure, low-level tensor program representation enabling tensor program optimization via program rewriting. See the web demo at https://g…
  ☆70Updated last month
• pnnl / mcl
  ☆11Updated last year
• hcho3 / skiplist_cuda
  A parallel (CUDA) implementation of skiplist
  ☆15Updated 6 years ago
• CSUS-LLVM / OptSched
  Optimizing scheduler. Combinatorial instruction scheduling project.
  ☆26Updated 3 weeks ago
• fpgasystems / fpga-hyperloglog
  FPGA-based HyperLogLog Accelerator
  ☆12Updated 5 years ago
• spcl / daceml
  A Data-Centric Compiler for Machine Learning
  ☆84Updated last year
• CMU-SAFARI / SMASH
  SMASH is a hardware-software cooperative mechanism that enables highly-efficient indexing and storage of sparse matrices. The key idea of…
  ☆16Updated 5 years ago
• wpmed92 / shaderpulse
  A GLSL compiler targeting SPIR-V mlir
  ☆20Updated 8 months ago