j-core / jcore-socLinks
J-Core SoC Base Platfrom. Top level for FPGA platforms, pulls in CPU, BootROM and various IP blocks.
☆28Updated 5 years ago
Alternatives and similar repositories for jcore-soc
Users that are interested in jcore-soc are comparing it to the libraries listed below
Sorting:
- J-Core J2/J32 5 stage pipeline CPU core☆61Updated 5 years ago
- This is a portable, open source emulator of the 32-bit Inmos T414/T800/T801/T805 Transputer family, and a host/file I/O Server that inter…☆21Updated this week
- Kakao Linux☆39Updated 7 months ago
- An experimental CPU core with 8-bit instruction words and 32-bit registers☆18Updated 7 months ago
- Simulation of the classic Pacman arcade game on a PanoLogic thin client.☆34Updated 6 years ago
- J-core SOC for ice40 FPGA☆20Updated 6 years ago
- Firmware for Alpha emulation under QEMU☆13Updated 4 years ago
- Website documenting a hardware project from the 1990s.☆78Updated 2 years ago
- Solaris/PPC☆21Updated 11 years ago
- A small 6502 system with MS BASIC in ROM☆54Updated 6 years ago
- ARM Cortex M0 emulator for DOS☆29Updated 2 years ago
- Moxie-compatible core repository☆47Updated 5 months ago
- LLVM backend for m88k architecture☆51Updated 5 months ago
- Alan Snyder's portable C Compiler☆17Updated 7 years ago
- linux_logo in 26+ kinds of assembly language☆17Updated 2 years ago
- What's the simplest CPU you can build?☆36Updated 11 years ago
- A bit-serial CPU☆19Updated 6 years ago
- Very compact (8KB) embedded x86 BIOS for FPGA/emulators/386EX☆46Updated last month
- 🔌 CPU86 - Free VHDL CPU8088 IP core - ported to Papilio and Max1000 FPGA☆47Updated 5 months ago
- Highfield's Inmos T414/T800 transputer emulator to run the Inmos Occam 2 Toolset.☆38Updated 2 years ago
- Convert ELF executables to DOS executables☆31Updated 6 years ago
- ☆13Updated last month
- helpers for qemu irix/solaris userland emulation☆16Updated 3 years ago
- f8 architecture documentation☆19Updated last week
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆54Updated 4 years ago
- Updated Plan9 cross compilers (for OSX and Linux) including RISC V target☆21Updated 5 years ago
- eForth for the j1 simulator and actual J1 FPGAs☆38Updated 10 years ago
- Historical sources for the TRIvial Operating System☆44Updated 6 years ago
- An implementation of the Xerox IFS protocol suite☆12Updated 2 years ago
- sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility☆31Updated last year