智能计算系统
☆15Dec 31, 2020Updated 5 years ago
Alternatives and similar repositories for AI-Computing-Systems
Users that are interested in AI-Computing-Systems are comparing it to the libraries listed below
Sorting:
- 智能计算系统作业(2021年)☆53May 25, 2021Updated 4 years ago
- 智能计算系统 实验部分☆154Nov 25, 2021Updated 4 years ago
- 智能计算系统课程(陈云霁)课后作业记录☆55Jun 27, 2020Updated 5 years ago
- mumax3 with sot(spin orbit torque)☆11Mar 3, 2023Updated 2 years ago
- This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is …☆11May 2, 2022Updated 3 years ago
- 智能计算系统作业☆148Dec 16, 2023Updated 2 years ago
- ☆11Jul 14, 2024Updated last year
- Quantized training method for RRAM-based systems.☆12Sep 24, 2018Updated 7 years ago
- MESMERIC: A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies☆10Oct 1, 2020Updated 5 years ago
- ☆18May 1, 2024Updated last year
- ☆23Oct 24, 2025Updated 4 months ago
- 南开计算机学院本科生毕设模板 根据硕士/博士模板修改而来☆15Jun 11, 2021Updated 4 years ago
- a Computing In Memory emULATOR framework☆15May 19, 2024Updated last year
- 南京大学智能计算系统课程实验☆12Oct 19, 2023Updated 2 years ago
- Models and training scripts for "LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures" (ISCAS 2021).☆17Mar 25, 2021Updated 4 years ago
- Undergraduate 2017-2021☆13Dec 1, 2020Updated 5 years ago
- Architecture for RRAM multilevel programming☆17Sep 6, 2018Updated 7 years ago
- 初步版IDEA使用指南☆23Jan 18, 2019Updated 7 years ago
- Parametric NEM/MEM relay design with layout generation (KLayout: GDSII), FEM (Ansys/COMSOL), SPICE models, Liberty models, & more☆23Jun 8, 2024Updated last year
- ReRAM implementation on CNN☆18Dec 30, 2018Updated 7 years ago
- 一个简单的编译 SysY 语言(C 语言子集)到 Mips 的编译器,采用 Java 实现。☆23Dec 29, 2022Updated 3 years ago
- RISC-V SOC (both single and pipeline) implemented in Verilog. Passed all test codes provided by TA.☆20Jun 3, 2023Updated 2 years ago
- 国科大《智能计算系统》课程实验☆25May 12, 2024Updated last year
- 智能计算系统 AI Computing Systems 陈云霁☆189Dec 11, 2022Updated 3 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆25Nov 29, 2024Updated last year
- compiler design for 2021-BUAA-Compiler-lecture☆18Jan 8, 2022Updated 4 years ago
- 软件学院《程序设计实践》2022小学期仓库☆25Aug 12, 2022Updated 3 years ago
- ☆28Oct 14, 2025Updated 4 months ago
- Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of follow…☆26Dec 18, 2024Updated last year
- ☆30Jun 8, 2022Updated 3 years ago
- 北航OS课课设代码☆215Apr 24, 2023Updated 2 years ago
- Artifacts of EuroSys'24 paper "Exploring Performance and Cost Optimization with ASIC-Based CXL Memory"☆31Feb 21, 2024Updated 2 years ago
- ☆24Apr 20, 2024Updated last year
- A Manually-Annotated Code Generation Benchmark Aligned with Real-World Code Repositories☆36Sep 4, 2024Updated last year
- Detailed and step by step implementation of RISC-V CPU from scratch using Verilog. This work is part of my academic course EE2003, Introd…☆30May 1, 2021Updated 4 years ago
- Official repository of SpikeZIP-TF in ICML2024☆49Dec 4, 2024Updated last year
- 华中科技大学计算机科学研究生复试上机测试题部分汇总☆32Feb 21, 2020Updated 6 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆47Jan 26, 2023Updated 3 years ago
- BUAA 编译原理 SysY to PCODE☆35Jul 30, 2024Updated last year