bigmagic123 / d1-nezha-baremeta
riscv64 d1-nezha baremeta(Allwinner D1 riscv chip)
☆77Updated 2 years ago
Related projects ⓘ
Alternatives and complementary repositories for d1-nezha-baremeta
- Linux0.11 with MMU for K210(RISC-V) Version☆89Updated 4 years ago
- Nuclei RISC-V Software Development Kit☆125Updated this week
- GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……☆90Updated 4 months ago
- Port of MIT's xv6 OS to the Nezha RISC-V board with Allwinner D1 SoC☆96Updated last year
- A baremetal experiment of Allwinner D1, without FEL☆31Updated last year
- Allwinner D1 For RISCV-64 Boards Awesome.☆78Updated 2 years ago
- Mainline-friendly SPL for D1☆34Updated 2 years ago
- DEPRECATED: Please update to risc-none-elf-gcc-xpack☆114Updated last year
- Trivial RISC-V Linux binary bootloader☆45Updated 3 years ago
- The GNU MCU Eclipse RISC-V Embedded GCC☆75Updated 5 years ago
- PLCT实验室维护的QEMU仓库。代码放在 plct- 前缀的分支里。☆26Updated 3 months ago
- K210 run linux nommu (From Damien Le Moal's patch)☆155Updated last year
- C-SKY Linux Port☆72Updated 3 weeks ago
- Mutil-Operating Syste with RT-Thread☆18Updated 2 years ago
- A 32-bit RISC-V SoC on FPGA that supports RT-Thread.☆12Updated last year
- The directory to save Bumblebee core's documents, just for GD32VF103 RISC-V Core☆40Updated 3 years ago
- Tiny FEL tools for allwinner SOC, support RISC-V D1 chip☆239Updated 3 weeks ago
- Nuclei RISC-V Linux Software Development Kit☆40Updated 2 months ago
- RISC-V Scratchpad☆59Updated 2 years ago
- RISC-V port of newlib☆95Updated 2 years ago
- Buildroot for T-HEAD XuanTie CPU Series☆111Updated 10 months ago
- This is a repo for recording and reporting RISCV platform's test and measurement continuously.☆52Updated 11 months ago
- ☆20Updated this week
- riscv64 opensbi baremetal☆11Updated 3 years ago
- The demo projects for Allwinner D1 SBC☆24Updated 3 years ago
- A 32-bit RISC-V SoC on FPGA that supports RT-Thread.☆22Updated last year
- Linux kernel source tree☆40Updated last month
- ☆17Updated 3 years ago
- Qemu for Xuantie RISC-V CPU, a generic machine emulator and virtualizer.☆31Updated 4 months ago
- RISC-V Profiles and Platform Specification☆112Updated last year