2horse9sun / ucb_sp20_cs152_lab
UC Berkeley CS152 Computer Architecture and Engineering Labs
☆24Updated 4 years ago
Alternatives and similar repositories for ucb_sp20_cs152_lab:
Users that are interested in ucb_sp20_cs152_lab are comparing it to the libraries listed below
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆80Updated last week
- ☆61Updated 2 years ago
- Gem5 with chinese comment and introduction (master) and some other std gem5 version.☆42Updated 3 years ago
- ☆29Updated 4 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆67Updated last month
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆52Updated last week
- MIT6.175 & MIT6.375 Study Notes☆39Updated 2 years ago
- ☆66Updated 10 months ago
- This repository collects all materials from past years of cs152.☆44Updated 10 months ago
- An artifact for Berti: an Accurate and Timely Local-Delta Data Prefetcher☆30Updated 2 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆36Updated 2 years ago
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆80Updated 10 months ago
- The official repository for the gem5 resources sources.☆67Updated 2 weeks ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆159Updated 2 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- Programming and Assignment Material for ECE 695☆15Updated 4 years ago
- ☆91Updated last year
- An Automatic Synthesis Tool for PIM-based CNN Accelerators.☆12Updated last year
- This is where gem5 based DRAM cache models live.☆16Updated 2 years ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- ☆66Updated 4 years ago
- A Study of the SiFive Inclusive L2 Cache☆61Updated last year
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆53Updated 5 months ago
- Examples of DPU programs using the UPMEM DPU SDK☆43Updated 3 months ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆49Updated 8 months ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆21Updated 6 years ago
- PIMeval simulator and PIMbench suite☆25Updated this week
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆64Updated 2 years ago
- gem5 FS模式实验手册☆35Updated 2 years ago
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆31Updated last year