jianzhang96 / AZPRcpu
AZPR cpu.《CPU自制入门》附录的Verilog代码,其中的日文注释翻译成了中文。
☆39Updated 4 years ago
Alternatives and similar repositories for AZPRcpu:
Users that are interested in AZPRcpu are comparing it to the libraries listed below
- ☆122Updated 2 years ago
- ☆71Updated last month
- An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.☆60Updated 2 years ago
- 一生一芯的信息发布和内容网站☆128Updated last year
- ☆80Updated last month
- 体系结构研讨 + ysyx高阶大纲 (WIP☆148Updated 5 months ago
- ☆141Updated 6 months ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆103Updated 2 years ago
- ☆63Updated 7 months ago
- a training-target implementation of rv32im, designed to be simple and easy to understand☆57Updated 3 years ago
- ☆21Updated last year
- ☆146Updated last year
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆49Updated 2 years ago
- ☆171Updated this week
- 国科大一生一芯第二期: RISCV-64 五级流水线CPU☆17Updated 3 years ago
- Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.☆170Updated 3 years ago
- 一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .☆26Updated 2 years ago
- ☆62Updated 3 months ago
- An exquisite superscalar RV32GC processor.☆151Updated 2 months ago
- ☆34Updated last year
- ☆62Updated last year
- 《从零开始的RISC-V模拟器开发》配套的PPT和教学资料☆215Updated 3 years ago
- An out-of-order execution algorithm for pipeline CPU, implemented by verilog☆39Updated 7 years ago
- This project utilizes the Digital circuit simulation software,to build a CPU that supports a simple instruction set and simple peripheral…☆53Updated 3 months ago
- The Ultra-Low Power RISC Core☆47Updated 5 years ago
- A small SoC with a pipeline 32-bit RISC-V CPU.☆63Updated 2 years ago
- ☆269Updated this week
- ☆201Updated last year
- Run rocket-chip on FPGA☆67Updated 4 months ago
- A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …☆38Updated last year