iDoka / GOST-28147-89Links
Verilog HDL implementation of the GOST 28147-89 — a Soviet and Russian government standard symmetric key block cipher
☆17Updated last year
Alternatives and similar repositories for GOST-28147-89
Users that are interested in GOST-28147-89 are comparing it to the libraries listed below
Sorting:
- Mastering FPGASIC Book☆18Updated 3 years ago
- Collect of various scripts for helping work with EDA-tools (ASIC, FPGA, etc)☆32Updated 11 months ago
- Методические материалы к лабораторным работам дисциплины "Проектирование цифровых устройств на языке Verilog"☆11Updated last year
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆88Updated 2 years ago
- VHDL PCIe Transceiver☆28Updated 4 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆30Updated 2 years ago
- FPGA board-level debugging and reverse-engineering tool☆38Updated 2 years ago
- A configurable USB 2.0 device core☆31Updated 5 years ago
- Software Defined Radio receiver in Marsohod2 Altera Cyclone III board☆46Updated 9 years ago
- JESD204B core for Migen/MiSoC☆36Updated 4 years ago
- FTDI EEPROM User Area Writer For Xilinx JTAG Programmer☆12Updated 11 years ago
- Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020☆54Updated 8 years ago
- Contains source code for sin/cos table verification using UVM☆20Updated 4 years ago
- cryptography ip-cores in vhdl / verilog☆41Updated 4 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆33Updated 4 months ago
- Cortex-M0 DesignStart Wrapper☆19Updated 5 years ago
- ☆45Updated 2 years ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 6 years ago
- FPGA examples on Google Colab☆24Updated last year
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated last year
- Various JTAG boundary scan tools☆35Updated 4 years ago
- Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm☆33Updated 6 years ago
- Generic Logic Interfacing Project☆46Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆59Updated last month
- Small footprint and configurable JESD204B core☆44Updated last month
- Small footprint and configurable SPI core☆42Updated last week
- Testing FPGA2SDRAM interface on Altera Cyclone V SoC☆14Updated 10 years ago
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆46Updated 4 years ago
- ice40 USB Analyzer☆58Updated 4 years ago
- FPGA-based SDK projects for SCRx cores☆18Updated 3 years ago