Alternatives and similar repositories for NandGame:

Users that are interested in NandGame are comparing it to the libraries listed below

• arasgungore / third-order-Butterworth-filter
  An LTspice project which contains third-order Butterworth filters built both using an inductor and a current conveyor.
  ☆19Updated last year
• TinyTapeout / tinytapeout-06
  Tiny Tapeout 06
  ☆12Updated 2 months ago
• arasgungore / 256-colors-with-VGA
  A VHDL-based VGA driver to display 256 different colors on a monitor.
  ☆14Updated 2 years ago
• digetx / tegra2_qemu
  Tegra2 emulation
  ☆23Updated 3 years ago
• himanshu5-prog / vortexGPU
  ☆20Updated 4 years ago
• semify-eda / waveform-generator
  Waveform Generator
  ☆11Updated 2 years ago
• rolandbernard / kleine-riscv
  A small and simple rv32i core written in Verilog
  ☆13Updated 2 years ago
• OldRepoPreservation / mpeg2fpga
  An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.
  ☆22Updated 6 years ago
• arasgungore / VGA-based-screensaver
  A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.
  ☆18Updated 2 years ago
• teknohog / rautanoppa
  Hardware random number generator for FPGAs
  ☆9Updated 9 years ago
• ARIES-Embedded / riscv-on-max10
  Reference designs and firmware for open-source RISC-V core implementation on MX10 and SpiderSoM
  ☆14Updated 2 years ago
• lupyuen / nuttx-tinyemu
  Apache NuttX RTOS in the Web Browser: TinyEMU with VirtIO
  ☆23Updated last year
• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆16Updated 2 years ago
• Testato / TeraTerm
  Unofficial Git conversion (from Svn) of the TeraTerm 4.100
  ☆11Updated 6 years ago
• antmicro / lpddr4-testbed
  Experimental breakout board for a signle 200-ball WFBGA LPDDR4 chip in SO-DIMM DDR4 form factor.
  ☆13Updated last year
• FreeRTOS / FreeRTOS-Kernel-Partner-Supported-Ports
  ☆14Updated 3 weeks ago
• Wren6991 / Hazard3-SWD-SoC
  Example Hazard3 + OpenDAP RISC-V SWD SoC integration
  ☆9Updated 2 years ago
• freecores / rtc
  No description
  ☆9Updated 10 years ago
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆66Updated 10 years ago
• DoctorWkt / ULX3S-Blinky
  A blinky project for the ULX3S v3.0.3 FPGA board
  ☆16Updated 6 years ago
• RPG-7 / SoC-KC-LS1u
  As a salute to the guy who inspired me to become EE engineer. This is the RTL version of his homebrew CPU core (KC-LS1u)
  ☆16Updated last year
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆26Updated 3 years ago
• bravegnu / usim
  A Cortex-M0 simulator written in C++.
  ☆22Updated 2 years ago
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆32Updated this week
• mikeakohn / riscv_fpga
  Implementation of a RISC-V CPU in Verilog.
  ☆14Updated last month
• OpenPOWERFoundation / a2o
  The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, …
  ☆46Updated 11 months ago
• farlepet / lambda-kern
  Multi-architecture hobby operating system created in C
  ☆16Updated last month
• deadsy / rvdbg
  RISC-V Debugger
  ☆16Updated 3 weeks ago
• scs / uclinux
  The uCLinux operating system adapted for the leanXcam
  ☆41Updated 10 years ago
• RTimothyEdwards / irsim
  IRSIM switch-level simulator for digital circuits
  ☆32Updated 2 weeks ago