ajithcodesit / 8-bit_fpga_cpu
An 8-Bit CPU implemented in an FPGA
☆18Updated 4 years ago
Alternatives and similar repositories for 8-bit_fpga_cpu:
Users that are interested in 8-bit_fpga_cpu are comparing it to the libraries listed below
- ☆32Updated 2 years ago
- 65C02 microprocessor in verilog, small size,reduced cycle count, asynchronous interface☆71Updated last year
- FPGA based microcomputer sandbox for software and RTL experimentation☆49Updated last week
- ☆31Updated 11 months ago
- Verilog sources for simple 6502 computer.☆25Updated 4 years ago
- Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).☆41Updated last year
- A CPU on an FPGA that you can play Zork on☆49Updated 8 years ago
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆60Updated last month
- Enhanced 6502/65C02 Microprogrammed FPGA Processor Core (Verilog-2001)☆31Updated 2 years ago
- Tools for FPGA development.☆44Updated last year
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆79Updated 4 years ago
- Featherweight RISC-V implementation☆52Updated 3 years ago
- ☆28Updated this week
- Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for You in Thirty Hours" Workshop☆79Updated last year
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆116Updated 5 months ago
- Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.☆57Updated last month
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆74Updated this week
- RV32I single cycle simulation on open-source software Logisim.☆17Updated 2 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆67Updated 2 years ago
- Microprogrammed 65C02-compatible FPGA Processor Core (Verilog-2001)☆53Updated 8 years ago
- MR1 formally verified RISC-V CPU☆51Updated 6 years ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆43Updated last year
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- ☆42Updated 3 years ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆25Updated 3 years ago
- RISC-V implementation of RV32I for FPGA board Tang Nano 9K utilizing on-board burst PSRAM, flash and SD card☆18Updated this week
- Reusable Verilog 2005 components for FPGA designs☆39Updated last year
- IceChips is a library of all common discrete logic devices in Verilog☆137Updated 2 months ago
- A blinky project for the ULX3S v3.0.3 FPGA board☆16Updated 5 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆86Updated 4 years ago