GeneralLi95 / nudt_graduation
NUDT硕士学位申请流程总结
☆15Updated 4 years ago
Related projects ⓘ
Alternatives and complementary repositories for nudt_graduation
- Code of "Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures", TCAD 2020☆7Updated 3 years ago
- [TRETS'23, FPT'20] CHIP-KNN: Configurable and HIgh-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs☆14Updated 7 months ago
- including compiler to encode DGL GNN model to instructions, runtime software to transfer data and control the accelerator, and hardware v…☆11Updated last year
- A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.☆17Updated 4 months ago
- A Comprehensive Model-Based Analysis Framework for High Level Synthesis of Real Applications☆34Updated 4 years ago
- [HPCA 2022] GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design☆32Updated 2 years ago
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆28Updated last month
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆31Updated 2 years ago
- Benchmarks for Approximate Circuit Synthesis☆13Updated 4 years ago
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆17Updated 2 years ago
- An end-to-end GCN inference accelerator written in HLS☆18Updated 2 years ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆20Updated last year
- ☆24Updated 7 months ago
- ☆26Updated 3 years ago
- ☆15Updated 3 years ago
- Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines☆16Updated 2 years ago
- GOMIL: Global Optimization of Multiplier by Integer Linear Programming☆10Updated 3 years ago
- ☆9Updated 2 years ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆14Updated 10 months ago
- [FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs☆23Updated last year
- ☆12Updated 2 years ago
- Dataset for ML-guided Accelerator Design☆31Updated this week
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆17Updated last year
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆37Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆54Updated 7 months ago
- NeuroSync: A Scalable and Accurate Brain Simulation System using Safe and Efficient Speculation (HPCA 2022)☆8Updated 2 years ago
- A Deep-Reinforcement-Learning-Based Scheduler for FPGA HLS☆13Updated 3 years ago
- A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.☆36Updated 2 years ago
- Heterogeneous simulator for DECADES Project☆29Updated 5 months ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆25Updated 9 months ago
- ☆10Updated last year