OLS is a $50 32 channel Logic Analyzer
☆125Jul 25, 2011Updated 15 years ago
Alternatives and similar repositories for OpenBench-Logic-Sniffer
Users that are interested in OpenBench-Logic-Sniffer are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- OpenBench LogicSniffer repository☆330Jul 29, 2023Updated 3 years ago
- ICE40 FPGA Cape for Beaglebone☆53Sep 14, 2020Updated 6 years ago
- Y80e - Z80/Z180 compatible processor extended by eZ80 instructions☆23Jul 17, 2014Updated 12 years ago
- Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm☆35Oct 15, 2018Updated 7 years ago
- A Software Suite that implements a logic analyzer with the PRU on the BeagleBone / BeagleBone Black.☆479Mar 25, 2024Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Adaptation of gxemul to support the CHERI MIPS unit test suite and certain CHERI features☆15Dec 8, 2015Updated 10 years ago
- Verilog for the Bus Pirate Ultra FPGA☆26Dec 12, 2019Updated 6 years ago
- Open Source Open Hardware Single Board BASIC computer☆34Jul 2, 2019Updated 7 years ago
- A versatile wireless monitoring device that combines ECG, impedance pneumography, photoplethysmography, SPO2 calculation, galvanic skin r…☆22Mar 12, 2017Updated 9 years ago
- Top level for the November shuttle☆13Nov 20, 2021Updated 4 years ago
- FPGA HDL Sources.☆25Jun 24, 2014Updated 12 years ago
- nMigen examples for the ULX3S board☆16Nov 30, 2020Updated 5 years ago
- Implementation of a SUMP compatible logic analyzer for the Arduino☆500Oct 20, 2023Updated 2 years ago
- The CAT Board is a Raspberry Pi HAT with a Lattice iCE40HX FPGA.☆62Feb 27, 2024Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Building an embedded Rust application on top of the ASF4 C vendor library☆15Mar 16, 2020Updated 6 years ago
- Papilio Pro FPGA board☆16Nov 26, 2012Updated 13 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- Some Python scripts to program Xilinx FPGAs using OpenOCD☆25Oct 22, 2016Updated 9 years ago
- Some crazy experiments about using a FPGA to transmit a TV signal old-style☆13Oct 13, 2018Updated 7 years ago
- PCB prototype board with different SMT footprints☆14May 25, 2015Updated 11 years ago
- Highly configurable 4-channel frequency shifter platform utilising the LMS8001A RFIC☆36May 25, 2026Updated 3 months ago
- This repository is obsolete and contains code examples for ModusToolbox 1.x☆14Jul 9, 2026Updated 2 months ago
- C source code for the LPC ARM.☆20Jun 27, 2014Updated 12 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Z80 Protocol Decoder (for logic analysis capture files)☆27May 26, 2024Updated 2 years ago
- HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs☆13Feb 9, 2019Updated 7 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Nov 27, 2018Updated 7 years ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆25Nov 15, 2021Updated 4 years ago
- ☆273Jul 24, 2020Updated 6 years ago
- An open source FPGA design for DSLogic☆176Jul 8, 2014Updated 12 years ago
- Universal Disassembler program for 8-bit microprocessors☆28Dec 4, 2025Updated 9 months ago
- RF window sensors: STM32L0 + RFM69 + Android☆12Jun 14, 2022Updated 4 years ago
- MPSSE/JTAG impementation for the Raspberry Pi Pico☆15Mar 28, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A wishbone controlled scope for FPGA's☆95Jan 12, 2024Updated 2 years ago
- Library for the Dangerous Prototypes Bus Pirate☆40Apr 18, 2022Updated 4 years ago
- C++ libs based on STM32F10x_StdPeriph_Lib☆18Aug 23, 2018Updated 8 years ago
- ice40 UltraPlus demos☆16Oct 4, 2019Updated 6 years ago
- An Arduino support package for NXP LPC chips☆11May 30, 2016Updated 10 years ago
- BusPirate Console☆39May 20, 2017Updated 9 years ago
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆177Jun 24, 2021Updated 5 years ago