☆16Sep 20, 2025Updated last year
Alternatives and similar repositories for bare-metal-cstdlib
Users that are interested in bare-metal-cstdlib are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 9 years ago
- Simple Jupiter Ace implementation for the Ice40 (myStorm BlackIce)☆12Jan 28, 2018Updated 8 years ago
- XC2064 bitstream documentation☆19Sep 24, 2018Updated 8 years ago
- Tiny VGA Pmod board designed in KiCad☆26Sep 4, 2024Updated 2 years ago
- ☆11Dec 14, 2017Updated 8 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- This is the official repository for the STEMFIE App. STEMFIE is a construction set toy made with FreeCAD, similar to LEGO Technic.☆14Jan 30, 2025Updated last year
- A bare metal hello world in C for Risc-V using QEMU to test☆20Jul 21, 2024Updated 2 years ago
- HDMI-LVDS adapter for Vaio P displays☆11Oct 2, 2026Updated 3 weeks ago
- The OpenCpuX API☆10Jun 26, 2026Updated 4 months ago
- KISCV, a KISS principle riscv32i CPU☆28Jan 11, 2025Updated last year
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- Space Invaders in Verilog for the iCE40 H1K☆18Feb 15, 2024Updated 2 years ago
- Minimal ZX Spectrum for Ulx3s ECP5 board☆12May 7, 2020Updated 6 years ago
- Hackaday Supercon 2019 Logic Noise Badge Workshop☆29Nov 20, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- CPOL=0, CPHA=0 SPI core for practicing formal verification with yosys☆21May 20, 2020Updated 6 years ago
- Simple hello world example using qt5, cml, c++, cmake☆10Jan 18, 2017Updated 9 years ago
- simple wishbone client to read buttons and write leds☆19Nov 30, 2023Updated 2 years ago
- An implementation of "Tic Tac Toe" in Verilog. FPGA versus user, FPGA knows how to win!☆10Jan 14, 2026Updated 9 months ago
- An open source FPGA Enigma Machine created with Icestudio and Verilog☆20Nov 1, 2019Updated 7 years ago
- Demo board for TT04 and beyond☆37Aug 29, 2026Updated 2 months ago
- NN on FPGA☆22Jun 10, 2017Updated 9 years ago
- multi protocol interface tool☆23Aug 29, 2017Updated 9 years ago
- ☆13May 18, 2024Updated 2 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- Bare-metal programming on RP2350 dual-core ARM Cortex-m33/RISC-V Hazard3 (non-SDK)☆24May 16, 2025Updated last year
- ☆13Sep 1, 2026Updated 2 months ago
- RepRap printable version of Micropede motor module for Shellmo.☆10Nov 30, 2020Updated 5 years ago
- KiCAD parser written in python☆18Nov 19, 2024Updated last year
- FPGA Portable Music Generator☆11Aug 1, 2018Updated 8 years ago
- Artix7 SOM☆22Sep 9, 2024Updated 2 years ago
- Raspberry Pi hat to test Vaio P displays☆22Oct 2, 2026Updated 3 weeks ago
- ☆10Feb 16, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- latex class for manuals☆11Sep 10, 2024Updated 2 years ago
- Learning Verilog using IceStudio ( Board IceStick )☆11Jan 12, 2022Updated 4 years ago
- USB HID keyboard firmware☆10Oct 8, 2021Updated 5 years ago
- Documenting the Xilinx 7-series bit-stream format.☆16Oct 14, 2026Updated 2 weeks ago
- SVG collection of lab equipment☆13Nov 28, 2022Updated 3 years ago
- cfaqs-ko☆13Mar 18, 2021Updated 5 years ago
- A simple (&naive) Gitlab Client for iOS☆17May 10, 2016Updated 10 years ago