is a comprehensive, cross-platform standalone application built for modern Analog IC Designers. It streamlines the $g_m/I_D$ design methodology by automating the characterization of semiconductor devices (using Cadence Spectre) and providing a Universal Sizing Engine to instantly translate circuit specifications into precise transistor dimension…
☆19Apr 2, 2026Updated 6 months ago
Alternatives and similar repositories for GIDE-Universal-Design-Studio
Users that are interested in GIDE-Universal-Design-Studio are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Open Source RFIC Inductor and Transformer Layout Generation Toolkit☆25Jun 2, 2026Updated 4 months ago
- Python-to-schematic generator for Cadence Virtuoso. Define circuits in Python, auto-generate CDL netlists and schematics.☆36Aug 25, 2026Updated last month
- gm/Id design toolkit: lookup tables, design charts, and automated multicorner sizing of analog circuits☆160Sep 22, 2026Updated last week
- cheriot-kudu is a 32-bit dual-issue RISC-V MCU core with CHERIoT support☆19Updated this week
- A python3 gm/ID starter kit☆101May 22, 2026Updated 4 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Analog and RF blocks on Skywaters 130nm☆11Jul 30, 2022Updated 4 years ago
- Cloneless1 is an open-source tamper-resistant cryptographic ASIC design☆27Jul 30, 2026Updated 2 months ago
- scraps: SuperConducting Resonator Analysis and Plotting Software☆19Jan 21, 2024Updated 2 years ago
- Analog HDL Design Full-stack Agents☆22Jun 8, 2026Updated 3 months ago
- Python package for design and simulation of RF phase-locked loops☆15Apr 23, 2022Updated 4 years ago
- This repository contains a RISC-V System-on-Chip (SoC) design files implemented in SystemVerilog☆21Feb 9, 2025Updated last year
- Nix derivations for EDA tools☆12Nov 19, 2025Updated 10 months ago
- A survey of manufacturer-provided DRAM operating parameters and timings as specified by DRAM chip datasheets from between 1970 and 2021. …☆11May 4, 2022Updated 4 years ago
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆45Aug 8, 2026Updated last month
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- CERN PyTorch Tutorial for Jet Images generation with GANs☆10Apr 11, 2018Updated 8 years ago
- CoMeT is a new low-cost RowHammer mitigation that uses Count-Min Sketch-based aggressor row tracking, as described in our HPCA'24 paper h…☆11Jan 23, 2026Updated 8 months ago
- Development repository for openEMS workflow for IHP SG13G2☆72Updated this week
- Open Agentic Design Automation - The open agent interface for EDA: Agent–EDA Contract☆27Aug 12, 2026Updated last month
- (Machine) Learning to Do More with Less☆14Jun 11, 2018Updated 8 years ago
- ☆17Sep 23, 2026Updated last week
- Evidence profiles for AI-generated RTL that expose what functional benchmarks miss. Seeking collaborators, design partners, and validatio…☆21Updated this week
- ☆13Jun 9, 2022Updated 4 years ago
- AllPix is a powerful tool for various simulation goals with pixel detectors, see the Twiki page for more details☆14Feb 20, 2019Updated 7 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- heptrkx-ctd☆18May 12, 2017Updated 9 years ago
- Python implementation of COM, as per IEEE 802.3-22 Annex 93A.☆20Updated this week
- Proof-of-concept implementation for the paper "Hammulator: Simulate Now - Exploit Later" (DRAMSec 2023)☆20Sep 15, 2025Updated last year
- Open memory initiative. Charter, scope, and v1 work.☆19Jun 2, 2026Updated 4 months ago
- Advanced Integrated Circuits 2025☆14Nov 1, 2025Updated 11 months ago
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆58Apr 9, 2026Updated 5 months ago
- A Hugo theme using Simple.css for clean, classless styling☆10Mar 14, 2026Updated 6 months ago
- SystemVerilog language-oriented exercises☆32Jun 30, 2026Updated 3 months ago
- 🧛🏻♂️ Dark theme for Hacker News☆16Oct 10, 2024Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- This repository provides supplementary material for our paper HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifi…☆22May 8, 2024Updated 2 years ago
- Slim and fast terminal emulator (124kB linked shared) with minimal external dependencies (Xlib,freetype)☆24Sep 23, 2026Updated last week
- This repository is for students to go through the Learning Journey for CHISEL and Funcitonal Programming with SCALA also perform tasks re…☆15Sep 7, 2025Updated last year
- A case study of a continuous-time Delta-Sigma modulator including system-level simulations/design of the CT-DSM, circuit-design of the fr…☆17Sep 4, 2026Updated 3 weeks ago
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆248Oct 6, 2025Updated 11 months ago
- A tapeout-ready structure for hierarchical analog design (v0.1).☆26Jan 16, 2026Updated 8 months ago
- New RowHammer mitigation mechanism that is area-, performance-, and energy-efficient especially at very low (e.g., 125) RowHammer thresho…☆17May 2, 2024Updated 2 years ago