Alternatives and similar repositories for MSW:

Users that are interested in MSW are comparing it to the libraries listed below

• mortie / CPU-16
  Logisim CPU.
  ☆31Updated 2 years ago
• Toms42 / logisim-RISC-V-CPU
  ☆21Updated 7 years ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆43Updated last year
• redfast00 / RCPU
  A pure Python 16 bits CPU emulator
  ☆46Updated 4 years ago
• jbchouinard / sixteen
  A 16-bit computer implemented with Logisim (logical circuit simulator).
  ☆18Updated 3 years ago
• IdanHo / RISCVEmu
  A Basic C++ RISC-V Emulator
  ☆17Updated 4 years ago
• Mazin-O3 / Veecom
  Simple Yet Powerful RISC-V Computer
  ☆115Updated last month
• dmatlack / moridin
  a simple operating system
  ☆10Updated 9 years ago
• mrw00kie / s5M0802
  ☆15Updated 6 years ago
• krishnan-r / Logisim-RISC-Processor
  A 32-Bit RISC Processor implemented on Logisim along with a python based assembler.
  ☆17Updated 7 years ago
• vsergeev / v8cpu
  v8cpu is a simple multi-cycle von Neumann architecture 8-bit CPU in under 500 lines of Verilog.
  ☆13Updated 6 years ago
• freecores / mcs-4
  4004 CPU and MCS-4 family chips
  ☆41Updated 10 years ago
• hneemann / Assembler
  Assembler for the Digital example processor
  ☆53Updated last year
• bobbl / punycc
  Very small self-compiling cross compiler for a subset of C
  ☆11Updated 5 months ago
• sehugg / nanoasm
  a tiny configurable assembler for Verilog projects
  ☆11Updated 3 years ago
• adzialocha / 8bit
  Notes on building a 8bit CPU
  ☆52Updated 7 years ago
• hughperkins / cpu-tutorial
  Tutorial on building your own CPU, in Verilog
  ☆33Updated 2 years ago
• Arlet / verilog-65C02-microcode
  65C02 microprocessor in verilog, small size,reduced cycle count, asynchronous interface
  ☆72Updated last year
• d99kris / nopeos
  Simple OS kernel with BASIC interpreter for x86
  ☆44Updated 2 months ago
• berkus / jamesm-tutorials
  James Molloy's Kernel Development Tutorials - backup copy from googlecode
  ☆29Updated 9 years ago
• DoctorWkt / CSCv2
  Version 2 of my Crazy Small CPU
  ☆69Updated 6 years ago
• fegennari / CircuitSolver
  Digital/Analog Circuit Design and Simulation System for Windows
  ☆25Updated 6 years ago
• DoctorWkt / ULX3S-Blinky
  A blinky project for the ULX3S v3.0.3 FPGA board
  ☆16Updated 6 years ago
• Basman74 / Sweet32-CPU
  Sweet32 32bit MRISC CPU - VHDL and software toolchain sources (including documentation)
  ☆36Updated 9 years ago
• wuhanstudio / nand2tetris-iverilog
  A 16-bit Hack CPU from scratch on FPGA.
  ☆47Updated 4 years ago
• masterfeizz / fake86
  Fake86 8086 PC Emulator
  ☆16Updated 8 years ago
• ElEctric-EyE / verilog-6502
  This fork family includes the 6502 upgraded to 32-bit address bus, in Verilog HDL
  ☆20Updated 4 years ago
• zeeshanrafique23 / RV32I-Logisim
  RV32I single cycle simulation on open-source software Logisim.
  ☆17Updated 2 years ago
• yuxincs / MIPS-CPU
  A Simulative MIPS CPU running on Logisim.
  ☆127Updated 2 years ago
• keithallatt / logisim-cpu
  4 Bit CPU build in Logisim Evolution, with Compiler and IDE.
  ☆21Updated 4 years ago