Alternatives and similar repositories for Logisim

Users that are interested in Logisim are comparing it to the libraries listed below

• r0the / logi7400
  Logisim 7400 series integrated circuits library
  ☆122Updated 5 years ago
• ZubinGou / 8086-emulator
  An Intel 8086 CPU emulator in Python with GUI.
  ☆139Updated last year
• T-K-233 / RISC-V-Single-Cycle-CPU
  RISC-V 32bit single-cycle CPUs written in Logisim, Verilog, and Chisel
  ☆437Updated 4 months ago
• kevinawalsh / logisim-evolution
  Digital logic designer and simulator
  ☆124Updated 5 months ago
• yuxincs / MIPS-CPU
  A Simulative MIPS CPU running on Logisim.
  ☆133Updated 2 years ago
• plctlab / plct-toolbox
  PLCT工具箱
  ☆31Updated 3 years ago
• BenjaminSchaaf / turning-complete-riscv
  Rust support for a CPU I made
  ☆102Updated 2 years ago
• racerxdl / riscv-online-asm
  RISC-V Online Assembler using Emscripten, Gnu Binutils
  ☆54Updated last year
• jamieiles / 80x86
  80186 compatible SystemVerilog CPU core and FPGA reference design
  ☆399Updated last year
• leijurv / Logisim-RISC-V
  ☆39Updated 7 years ago
• pmonta / FPGA-netlist-tools
  Tools for emulating transistor-level netlists on FPGAs
  ☆111Updated 14 years ago
• YAVGroup / Verilog-OJ
  Online judge server for Verilog | verilogoj.ustc.edu.cn
  ☆80Updated last year
• hehao98 / RISCV-Simulator
  A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation
  ☆184Updated last year
• NJU-ProjectN / i386-manual
  Intel 80386 Reference Programmer's Manual
  ☆68Updated 3 months ago
• Arlet / verilog-6502
  A Verilog HDL model of the MOS 6502 CPU
  ☆343Updated 2 years ago
• dosasm / masm-tasm
  run and debug TASM/MASM code in VSCode via JSDos, DOSBox and msdos-player
  ☆167Updated 3 months ago
• DoctorWkt / CSCvon8
  A crazy small 8-bit CPU built with only seventeen 7400-series chips.
  ☆106Updated 5 years ago
• risclite / R8051
  8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
  ☆185Updated 5 years ago
• riscvarchive / riscv-gcc
  ☆369Updated 2 years ago
• kvakil / venus
  RISC-V instruction set simulator built for education
  ☆203Updated 3 years ago
• rv2036 / rv2036-website
  Official website for Jiachen Project (甲辰计划).
  ☆55Updated 6 months ago
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆786Updated last week
• marmolejo / zet
  Open source implementation of a x86 processor
  ☆321Updated 7 years ago
• lawrancej / logisim
  Git fork of Logisim code base
  ☆221Updated 8 years ago
• TimRudy / ice-chips-verilog
  IceChips is a library of all common discrete logic devices in Verilog
  ☆144Updated 7 months ago
• ThaumicMekanism / venus
  RISC-V instruction set simulator built for education
  ☆157Updated 2 years ago
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆117Updated 7 months ago
• freecores / mcs-4
  4004 CPU and MCS-4 family chips
  ☆41Updated 10 years ago
• hm-riscv / vscode-riscv-venus
  VS Code extension with the Venus RISC-V simulator
  ☆75Updated 9 months ago
• jmahler / mips-cpu
  MIPS CPU implemented in Verilog
  ☆616Updated 7 years ago