Alternatives and similar repositories for Logisim:

Users that are interested in Logisim are comparing it to the libraries listed below

• T-K-233 / RISC-V-Single-Cycle-CPU
  RISC-V 32bit single-cycle CPUs written in Logisim, Verilog, and Chisel
  ☆429Updated 2 weeks ago
• lawrancej / logisim
  Git fork of Logisim code base
  ☆216Updated 8 years ago
• kevinawalsh / logisim-evolution
  Digital logic designer and simulator
  ☆121Updated last month
• ESEO-Tech / emulsiV
  A visual simulator for teaching computer architecture using the RISC-V instruction set
  ☆178Updated last year
• r0the / logi7400
  Logisim 7400 series integrated circuits library
  ☆114Updated 5 years ago
• ShawnZhong / JsSpim
  Online MIPS32 Simulator Based on Spim
  ☆74Updated 5 years ago
• freecores / mcs-4
  4004 CPU and MCS-4 family chips
  ☆41Updated 10 years ago
• ejrh / cpu
  A very primitive but hopefully self-educational CPU in Verilog
  ☆141Updated 10 years ago
• racerxdl / riscv-online-asm
  RISC-V Online Assembler using Emscripten, Gnu Binutils
  ☆49Updated last year
• TimRudy / ice-chips-verilog
  IceChips is a library of all common discrete logic devices in Verilog
  ☆138Updated 3 months ago
• eugenelepekhin / LogicCircuit
  LogicCircuit – is free, open source educational software for designing and simulating digital logic circuits.
  ☆67Updated 3 weeks ago
• NJU-ProjectN / i386-manual
  Intel 80386 Reference Programmer's Manual
  ☆64Updated this week
• ZubinGou / 8086-emulator
  An Intel 8086 CPU emulator in Python with GUI.
  ☆129Updated 10 months ago
• plctlab / plct-toolbox
  PLCT工具箱
  ☆30Updated 2 years ago
• BenjaminSchaaf / turning-complete-riscv
  Rust support for a CPU I made
  ☆87Updated 2 years ago
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆426Updated 8 months ago
• jamieiles / 80x86
  80186 compatible SystemVerilog CPU core and FPGA reference design
  ☆387Updated 10 months ago
• jarikomppa / emu8051
  8051/8052 emulator with curses-based UI
  ☆119Updated 9 months ago
• Arlet / verilog-6502
  A Verilog HDL model of the MOS 6502 CPU
  ☆339Updated last year
• leijurv / Logisim-RISC-V
  ☆38Updated 6 years ago
• pmonta / FPGA-netlist-tools
  Tools for emulating transistor-level netlists on FPGAs
  ☆110Updated 13 years ago
• Arlet / verilog-65C02-microcode
  65C02 microprocessor in verilog, small size,reduced cycle count, asynchronous interface
  ☆72Updated last year
• fernandotcl / TinyEMU
  Tweaks to Fabrice Bellard's TinyEMU
  ☆128Updated last year
• grantae / OpenMIPS
  A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…
  ☆69Updated 5 years ago
• risclite / R8051
  8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
  ☆170Updated 5 years ago
• sunzenshen / mhrd-solutions
  My solutions to the NAND-to-CPU game MHRD
  ☆47Updated 7 years ago
• scutdig / Digiblock
  ☆21Updated last year
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆60Updated 2 months ago
• tilk / digitaljs_online
  Online demonstration for DigitalJS
  ☆131Updated 9 months ago
• MIPSfpga / schoolMIPS
  CPU microarchitecture, step by step
  ☆195Updated 4 years ago