freecores / fpu_double
FPU Double VHDL
☆12Updated 10 years ago
Related projects ⓘ
Alternatives and complementary repositories for fpu_double
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆24Updated 8 months ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆22Updated 4 years ago
- VHDL Modules☆23Updated 9 years ago
- ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)☆12Updated 6 years ago
- VHDL Library for implementing common DSP functionality.☆27Updated 6 years ago
- IEEE 754 single precision floating point library in systemverilog and vhdl☆26Updated last month
- Sigma-Delta Analog to Digital Converter in FPGA (VHDL)☆16Updated 6 years ago
- Portable HyperRAM controller☆48Updated 3 weeks ago
- Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…☆14Updated 2 years ago
- Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board☆20Updated 2 years ago
- USB Full Speed PHY☆39Updated 4 years ago
- VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and …☆22Updated 3 months ago
- RMII Firewall FPGA☆18Updated 4 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆18Updated 3 weeks ago
- ☆31Updated 9 months ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆25Updated 3 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆22Updated 4 months ago
- UART to AXI Stream interface written in VHDL☆16Updated 2 years ago
- Fixed-point math library with VHDL, Python and MATLAB support☆18Updated 3 months ago
- SPI Master and Slave components to be used in all of FPGAs, written in VHDL.☆33Updated 4 years ago
- This is a circular buffer controller used in FPGA.☆33Updated 8 years ago
- ☆15Updated 4 years ago
- Example designs for the Spartan7 "S7 Mini" FPGA board☆27Updated 5 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Hardware description (VHDL) and configuration scripts (Python) of a versatile IIR Filter implemented as cascaded SOS/biquads. No vendor-s…☆18Updated 6 years ago
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆13Updated last year
- VHDL PCIe Transceiver☆26Updated 4 years ago
- Sata 2 Host Controller for FPGA implementation☆13Updated 7 years ago
- Verilog Repository for GIT☆29Updated 3 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆34Updated 3 years ago