FPGA Sega in Verilog, for Xilinx Virtex, circa 2002. Has an emulator thrown in, to simplify FPGA debugging.
☆76Nov 17, 2013Updated 12 years ago
Alternatives and similar repositories for sega-system-for-fpga
Users that are interested in sega-system-for-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- PS/2 Keyboard IP written in VHDL for Xilinx FPGA☆18Jul 11, 2015Updated 11 years ago
- Verilog VPI VGA Simulator using SDL☆11Feb 9, 2015Updated 11 years ago
- An interpreter☆10Jul 27, 2016Updated 10 years ago
- Repository containing the DSP gateware cores☆14Mar 9, 2026Updated 7 months ago
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆15Sep 23, 2020Updated 6 years ago
- A tool for creating HDL-Schematics☆10Updated this week
- An open-source VHDL library for FPGA design.☆32Jun 2, 2022Updated 4 years ago
- A library of VHDL components for Neural Networks☆24Sep 23, 2021Updated 5 years ago
- UNIXv7 ported to RISC-V, specifically the Longnan Nano SBC☆13Mar 30, 2023Updated 3 years ago
- PCB layout for my cheap FPGA HDMI experimenting board☆10Aug 21, 2014Updated 12 years ago
- Initial 0.0.1 push☆13Jun 10, 2016Updated 10 years ago
- A few tools for doing video processing on the Zybo FPGA board using VHDL☆11Jun 6, 2017Updated 9 years ago
- A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.☆23Jun 6, 2021Updated 5 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- An open source, parameterized SystemVerilog digital hardware IP library☆34May 26, 2024Updated 2 years ago
- ☆16Aug 9, 2023Updated 3 years ago
- A little tutorial on how to use UVVM (Universal VHDL Verification Methodology).☆12Oct 13, 2021Updated 5 years ago
- MS-DOS 2.0 restoration project☆10Apr 5, 2024Updated 2 years ago
- APL-like functions for use from Lua.☆18Mar 23, 2015Updated 11 years ago
- A low-level hierarchical netlist assembler for FPGAs☆13Jul 26, 2021Updated 5 years ago
- A Preprocessor for Verilog HDL written in C++☆11May 26, 2012Updated 14 years ago
- ☆12May 5, 2012Updated 14 years ago
- cryptography ip-cores in vhdl / verilog☆43Feb 20, 2021Updated 5 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- A browser-based ZX Spectrum live-coding environment☆14May 21, 2024Updated 2 years ago
- A simple to use VHDL module to display text on VGA display.☆40Dec 16, 2013Updated 12 years ago
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 9 years ago
- SEGA Genesis/Megadrive core, running on a Altera/Terasic DE1 board.☆64Oct 7, 2019Updated 7 years ago
- Real Digital Vivado IP Library☆10Nov 13, 2022Updated 3 years ago
- A vhdl package for reading and writing bitmap files.☆12Jan 9, 2018Updated 8 years ago
- C# projects that use ANTLR4 library to analyse VHDL and Verilog code☆11Feb 28, 2015Updated 11 years ago
- Toy scala/akka Bittorrent client. Written while learning scala and now unmaintained☆77Mar 13, 2015Updated 11 years ago
- Implementing coroutines, channels, message passing, etc.☆134Nov 23, 2021Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- A hardware implementation of the Consolite game console written in Verilog.☆11Jun 9, 2016Updated 10 years ago
- This is a TCL script that will take in Verilog and VHDL files and generate an instantiation template appropriately for the user to use in…☆10Dec 19, 2012Updated 13 years ago
- Cross EDA Abstraction and Automation☆46Updated this week
- Library for reading Xilinx .bit bitstream file headers with metadata extraction☆14Apr 7, 2026Updated 6 months ago
- Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CO…☆13Aug 14, 2020Updated 6 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆29Sep 9, 2026Updated last month
- Development and verification environment for the mor1kx core☆12Dec 29, 2014Updated 11 years ago