clementfarabet / neuflowLinks
Compiler toolkit for neuFlow.
☆26Updated 11 years ago
Alternatives and similar repositories for neuflow
Users that are interested in neuflow are comparing it to the libraries listed below
Sorting:
- CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms☆87Updated 8 months ago
- ☆10Updated 2 years ago
- ☆119Updated 7 years ago
- Reference workloads for modern deep learning methods.☆73Updated 2 years ago
- ☆35Updated 8 years ago
- ☆39Updated 8 years ago
- A domain-specific language and compiler for image processing☆76Updated 4 years ago
- Boda: A C++ Framework for Efficient Experiments in Computer Vision☆64Updated 5 years ago
- Proof-of-Concept CNN in Halide☆22Updated 8 years ago
- Input-aware cuBLAS/clBLAS implementation for better performance☆17Updated 2 years ago
- Training deep neural networks with low precision multiplications☆63Updated 9 years ago
- Base code and optimized code for the benchmarks used in the PolyMage paper published at ASPLOS 2015☆19Updated 9 years ago
- Binarized Neural Network TF training code + C matrix / eval library.☆101Updated 7 years ago
- HLS branch of Halide☆77Updated 6 years ago
- Binary Neural Network on IceStick FPGA.☆52Updated 6 years ago
- DyRACT Open Source Repository☆16Updated 9 years ago
- a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially☆40Updated 9 years ago
- Library for fast image convolution in neural networks on Intel Architecture☆29Updated 8 years ago
- training ternary neural networks☆14Updated 8 years ago
- Example code and instructions on getting Tensorflow Lite running on a Xilinx Zynq☆49Updated 7 years ago
- Binarized Neural Network☆9Updated 8 years ago
- Artificial Neural Network on Altera DE2☆35Updated 9 years ago
- ☆143Updated 6 years ago
- The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…☆29Updated 8 years ago
- The Shang high-level synthesis framework☆120Updated 11 years ago
- A fast deep neural network library (CPU) for speech recognition☆84Updated 6 years ago
- OpenCL Demos for Xilinx FPGAs☆31Updated 9 years ago
- Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…☆56Updated 4 years ago
- Quickstart for Spatial language☆34Updated 4 years ago
- RISC-V GPGPU☆34Updated 5 years ago