A high-performance, PPA (Performance, Power, Area) optimized Arithmetic Logic Unit (ALU) designed for a 32-bit processor core. This project demonstrates the complete RTL-to-GDS PRE-sign-off flow on a complex, pipelined unit, achieving a verified operating frequency of 1.66 GHz (602 ps period).
☆15Oct 21, 2026Updated 2 weeks ago
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