Alternatives and similar repositories for instruction-bench

Users that are interested in instruction-bench are comparing it to the libraries listed below

• ocxtal / opa64
  Armv8 A64 Assembly & Intrinsics Guide Server
  ☆25Updated 2 years ago
• RIKEN-RCCS / riken_simulator
  This is the git repository for RIKEN simulator designed to simulate the binary code for Fujitsu A64FX.
  ☆36Updated 5 years ago
• t-hishinuma / DD-AVX_v3
  Library of High Precision Sparse Matrix Operations Accelerated by SIMD
  ☆43Updated 4 years ago
• fujitsu / xbyak_translator_aarch64
  ☆45Updated last year
• fujitsu / dnnl_aarch64
  ☆53Updated 4 years ago
• massivethreads / massivethreads
  Light weight thread library
  ☆67Updated 9 months ago
• fujitsu / A64FX
  ☆466Updated last year
• syoyo / aobench
  Automatically exported from code.google.com/p/aobench
  ☆20Updated last year
• nlsynth / iroha
  Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)
  ☆35Updated 4 years ago
• nushio3 / formura
  Describe stencil formurae without even translating them
  ☆58Updated 8 years ago
• onikiri / onikiri2
  ☆39Updated 11 months ago
• FabricAttachedMemory / Emulation
  Configuration script to create virtual machines joined by a global shared memory pool
  ☆90Updated 4 years ago
• sx-aurora-dev / llvm-project
  llvm-project cloned from https://github.com/llvm/llvm-project and modified for VE
  ☆20Updated 3 weeks ago
• herumi / x86opti
  ☆38Updated 5 years ago
• herumi / misc
  ☆61Updated last week
• Tohoku-University-Takizawa-Lab / neoSYCL
  A SYCL Implementation for CPU and SX-Aurora TSUBASA
  ☆53Updated 2 years ago
• kaityo256 / xbyak_aarch64_handson
  Tutorials for ARM SVE on Docker
  ☆43Updated 2 years ago
• alphaKAI / cr0cd
  CR0.CD manipulate Linux Kernel Module as a proc filesystem
  ☆19Updated 6 years ago
• HSAFoundation / HSAIL-Tools
  Tools for parsing, assembling, and disassembling HSAIL.
  ☆74Updated 5 years ago
• herumi / s_xbyak
  ASM generation tool for GAS/NASM/MASM with Xbyak-like syntax in Python
  ☆12Updated 5 months ago
• tmatsuya / wiki
  ☆38Updated 8 years ago
• msyksphinz-self / swimmer_riscv
  Instruction set simulator for RISC-V
  ☆53Updated 5 years ago
• kadomoto / poyo-v
  Open source RISC-V IP core for FPGA/ASIC design
  ☆31Updated last year
• herumi / cybozulib
  a tiny library for C++
  ☆65Updated 2 months ago
• fujitsu / xbyak_aarch64
  ☆205Updated 4 months ago
• suzumura / graph500
  World championship code for Graph500
  ☆25Updated last year
• fukushimalab / hpc_exercise
  ネットワーク系演習II：ハイパフォーマンスコンピューティング
  ☆64Updated 8 months ago
• nlsynth / karuta
  Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…
  ☆107Updated 3 years ago
• lpha-z / ltmpc
  C++11TMP compile time C compiler
  ☆27Updated 7 years ago
• SX-Aurora / aveo
  Another|Alternative|Awesome VE Offloading stack using ve-urpc
  ☆14Updated 2 years ago