TopoDroid code base
☆74Jul 21, 2026Updated this week
Alternatives and similar repositories for topodroid
Users that are interested in topodroid are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Interfacing VHDL and foreign languages with VUnit☆15Feb 20, 2020Updated 6 years ago
- Example of Test Driven Design with VUnit☆16Nov 22, 2021Updated 4 years ago
- ASCII art figures can be parsed and output as SVG, PNG, JPEG, PDF and more. This project provides a python package and a command line scr…☆21Jul 5, 2017Updated 9 years ago
- VHDL related news.☆27Updated this week
- Tool to compute molecular Solvent Excluded Surface meshes on the GPU using CUDA☆16Jun 30, 2026Updated 3 weeks ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A MolProbity-style visualization plugin for PyMOL☆16Jul 26, 2022Updated 3 years ago
- Atom Hardware IDE☆13May 4, 2021Updated 5 years ago
- Trying to verify Verilog/VHDL designs with formal methods and tools☆43Mar 7, 2024Updated 2 years ago
- Rust proof-of-concept for GPU waveform rendering☆13Jul 22, 2020Updated 5 years ago
- A getting started presentation (with examples) about how to use FLOSS for FPGA development.☆37Sep 18, 2023Updated 2 years ago
- Plugin for folding sequences directly in PyMOL☆29Aug 5, 2025Updated 11 months ago
- 5 days (30 hours) is all what took me to learn the basics and design a pipelined RV32I core. Check this article to know more !☆13Feb 2, 2022Updated 4 years ago
- Logistic regression FPGA core☆19Apr 7, 2021Updated 5 years ago
- GitHub Action to keep a 'tip' pre-release always up-to-date☆20Dec 18, 2021Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- CLI tool for RTL design space exploration on top of Vivado☆15Jun 5, 2023Updated 3 years ago
- This repository is an excuse to learn about Convolutional Neural Networks by implementing one in FPGA. The main goal is to learn, and to …☆12Jul 12, 2020Updated 6 years ago
- A linux'ish build system for System on Chip designs, based on GHDL☆14Dec 14, 2024Updated last year
- GHDL C extensions☆12Feb 20, 2020Updated 6 years ago
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆53Updated this week
- a project to check the FOSS synthesizers against vendors EDA tools☆12Sep 26, 2020Updated 5 years ago
- Unified Coverage Interoperability Standard (UCIS)☆15Jul 13, 2026Updated last week
- A translation of the Xilinx XPM library to VHDL for simulation purposes☆70Updated this week
- ☆17Feb 9, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- GHDL Verilator Interface. A glue code generator for VHDL Verilog cosimulation.☆17Apr 10, 2025Updated last year
- Synthesizable FIR filters in VHDL☆15Jul 19, 2019Updated 7 years ago
- Repo to help explain the different options users have for packaging.☆19Jun 8, 2022Updated 4 years ago
- Generator for VHDL regular expression matchers☆15Jan 11, 2021Updated 5 years ago
- ☆15May 29, 2020Updated 6 years ago
- Antibody structure prediction☆37Dec 16, 2025Updated 7 months ago
- ☆17Apr 20, 2023Updated 3 years ago
- This is the previous iteration of the website. The current website source is https://github.com/iusrepo/iusrepo.github.io.☆13Jul 24, 2019Updated 6 years ago
- Dockerfile for ModelSim Version 16 GUI☆15Aug 16, 2021Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Packer templates for FreeBSD 10.0☆16Sep 22, 2015Updated 10 years ago
- Simple Python parser for extracting HDL (VHDL or Verilog) documentation☆24Mar 1, 2024Updated 2 years ago
- LiteX Accelerator Block for GNU Radio☆23Feb 6, 2022Updated 4 years ago
- ☆19Oct 5, 2020Updated 5 years ago
- GUI editor for hardware description designs☆30Jul 11, 2023Updated 3 years ago
- Super Mario Bros. (NES) gameplay dataset for machine learning.☆13Jul 22, 2025Updated last year
- ☆20May 5, 2020Updated 6 years ago