We made ISAC radar using Zedboard and AD9361, by receiving the transmitted chirp signals, calculating the autocorrelation and FFT to get the ranging domain (delayed), and calculating the extracted 128 packets of data to do FFT to get the Doppler domain (slow FFT). This completes the distance and speed measurement.
☆27Jan 11, 2025Updated last year
Alternatives and similar repositories for Zedboard_AD9361_radar
Users that are interested in Zedboard_AD9361_radar are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This project presents the implementation of Quantum Key Distribution (QKD) Protocol:BB84 on FPGA. Quantum Communication Methodology has b…☆15Dec 29, 2022Updated 3 years ago
- Generates simple AXI4-lite IP for use in Vivado from register specifications☆16Apr 11, 2025Updated last year
- This repo is to inplemente the riscv soc on the xilinx pynq-z2 board☆12Dec 6, 2023Updated 2 years ago
- Analysis and Simulation of LoRaWAN LR-FHSSfor Direct-to-Satellite Scenario☆14Feb 24, 2022Updated 4 years ago
- USRP-N210 mixed FPGA/software implementation of an automated spectrum scanner☆21Nov 12, 2021Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 在FPGA端实现JPEG编码(开发中……☆13Oct 17, 2024Updated last year
- 基于arm cortex-m0内核的xillinx fpga sopc工程项目☆13May 28, 2019Updated 7 years ago
- ☆26Nov 24, 2024Updated last year
- Pure JavaScript NETCONF library for Node.js☆26Sep 22, 2022Updated 4 years ago
- IPv4/UDP stack written in VHDL code, for interfacing with an FPGA over Ethernet☆13Jun 2, 2021Updated 5 years ago
- B站抢票☆25Apr 25, 2024Updated 2 years ago
- 学习AXI接口,以及xilinx DDR3 IP使用☆40Mar 6, 2017Updated 9 years ago
- ☆17Jul 10, 2023Updated 3 years ago
- A fully functioning MIDI synthesizer using an ARM Cortex-M4F processor (Tiva LaunchPad TM4C123G).☆17Jun 22, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- OTFS Modulation FPGA Implementation (Verilog Version)☆17Mar 25, 2025Updated last year
- LiteX based FPGA gateware for Thunderscope.☆31Apr 21, 2026Updated 5 months ago
- Phased Array Radar☆13Aug 15, 2012Updated 14 years ago
- LTE Turbo Decoder using BCJR algorithm☆10Apr 8, 2018Updated 8 years ago
- Standalone application based on ADI hdl and no_OS for ANTSDR.☆29Mar 27, 2025Updated last year
- SystemVerilog package for reading, manipulating, and writing JSON-formatted data☆12Feb 19, 2022Updated 4 years ago
- FPGA based FM radio with traditional IF architecture and digital IQ demodulation☆24Oct 1, 2024Updated last year
- ☆11May 27, 2014Updated 12 years ago
- Advanced multi-band GNSS SDR front-end implementation in an RFSoC integrated circuit. GPL-3.0 license☆29Sep 3, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆70Mar 15, 2022Updated 4 years ago
- 2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件☆47Nov 27, 2022Updated 3 years ago
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 5 years ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆15Jul 23, 2020Updated 6 years ago
- 软件无线电,使用FPGA进行正交解调。☆23Feb 18, 2019Updated 7 years ago
- ☆15Aug 10, 2023Updated 3 years ago
- Open Hardware Zynq System on Module☆31Jul 25, 2015Updated 11 years ago
- ☆21Dec 9, 2018Updated 7 years ago
- 基于ALINX-AX7020平台的Linux驱动开发学习。☆57Mar 27, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Synopsys Design compiler, VCS and Tetra-MAX☆19May 29, 2018Updated 8 years ago
- things about Verilog hardware description language☆18Sep 18, 2018Updated 8 years ago
- AiLi (AI Library) notes: prompts, skills, commands & reusable workflows.☆16May 26, 2026Updated 4 months ago
- Experimental HF modem for amateur radio. Coherent OFDM + multi-carrier DPSK waveforms, LDPC FEC, selective-repeat ARQ, outcome-fitted ada…☆28Aug 7, 2026Updated last month
- These codes are for the paper that published on IEEE COMML: F. Liu, X. Shang, Y. Cheng and G. Zhang, "Computationally Efficient Maximum …☆11Apr 15, 2022Updated 4 years ago
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆21May 24, 2023Updated 3 years ago
- This repository contains a set of examples of opencl code that can run on the zedboard zynq all programmable soc.☆16Jan 13, 2016Updated 10 years ago